feat: define APU registers
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48679fa4ca
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1fd80c1c23
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@ -6,6 +6,7 @@ const GamePak = @import("bus/GamePak.zig");
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const Io = @import("bus/io.zig").Io;
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const Iwram = @import("bus/Iwram.zig");
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const Ppu = @import("ppu.zig").Ppu;
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const Apu = @import("apu.zig").Apu;
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const Scheduler = @import("scheduler.zig").Scheduler;
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const io = @import("bus/io.zig");
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@ -18,6 +19,7 @@ const panic_on_und_bus: bool = false;
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pak: GamePak,
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bios: Bios,
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ppu: Ppu,
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apu: Apu,
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iwram: Iwram,
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ewram: Ewram,
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io: Io,
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@ -27,6 +29,7 @@ pub fn init(alloc: Allocator, sched: *Scheduler, rom_path: []const u8, maybe_bio
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.pak = try GamePak.init(alloc, rom_path),
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.bios = try Bios.init(alloc, maybe_bios),
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.ppu = try Ppu.init(alloc, sched),
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.apu = Apu.init(),
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.iwram = try Iwram.init(alloc),
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.ewram = try Ewram.init(alloc),
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.io = Io.init(sched),
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@ -0,0 +1,144 @@
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const std = @import("std");
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const SoundFifo = std.fifo.LinearFifo(u8, .{ .Static = 0x20 });
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const io = @import("bus/io.zig");
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pub const Apu = struct {
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const Self = @This();
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ch1: ToneSweep,
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ch2: Tone,
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ch3: Wave,
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ch4: Noise,
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chA: DmaSound,
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chB: DmaSound,
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bias: io.SoundBias,
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ch_vol_cnt: io.ChannelVolumeControl,
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dma_cnt: io.DmaSoundControl,
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cnt: io.SoundControl,
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pub fn init() Self {
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return .{
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.ch1 = ToneSweep.init(),
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.ch2 = Tone.init(),
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.ch3 = Wave.init(),
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.ch4 = Noise.init(),
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.chA = DmaSound.init(),
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.chB = DmaSound.init(),
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.ch_vol_cnt = .{ .raw = 0 },
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.dma_cnt = .{ .raw = 0 },
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.cnt = .{ .raw = 0 },
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.bias = .{ .raw = 0x0200 },
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};
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}
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pub fn setSoundCntX(self: *Self, value: bool) void {
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self.cnt.apu_enable.write(value);
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}
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pub fn setSoundCntLLow(self: *Self, byte: u8) void {
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self.ch_vol_cnt.raw = (self.ch_vol_cnt.raw & 0xFF00) | byte;
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}
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pub fn setBiasHigh(self: *Self, byte: u8) void {
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self.bias.raw = (@as(u16, byte) << 8) | (self.bias.raw & 0xFF);
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}
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};
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const ToneSweep = struct {
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const Self = @This();
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sweep: io.Sweep,
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duty: io.Duty,
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envelope: io.Envelope,
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freq: io.Frequency,
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fn init() Self {
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return .{
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.sweep = .{ .raw = 0 },
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.duty = .{ .raw = 0 },
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.envelope = .{ .raw = 0 },
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.freq = .{ .raw = 0 },
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};
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}
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pub fn setFreqHigh(self: *Self, byte: u8) void {
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self.freq.raw = (@as(u16, byte) << 8) | (self.freq.raw & 0xFF);
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}
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};
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const Tone = struct {
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const Self = @This();
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duty: io.Duty,
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envelope: io.Envelope,
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freq: io.Frequency,
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fn init() Self {
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return .{
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.duty = .{ .raw = 0 },
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.envelope = .{ .raw = 0 },
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.freq = .{ .raw = 0 },
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};
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}
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pub fn setFreqHigh(self: *Self, byte: u8) void {
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self.freq.raw = (self.freq.raw & 0x00FF) | (@as(u16, byte) << 8);
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}
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};
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const Wave = struct {
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const Self = @This();
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/// Write-only
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select: io.WaveSelect,
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/// NR31
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length: u8,
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vol: io.WaveVolume,
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freq: io.Frequency,
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fn init() Self {
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return .{
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.select = .{ .raw = 0 },
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.vol = .{ .raw = 0 },
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.freq = .{ .raw = 0 },
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.length = 0,
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};
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}
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};
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const Noise = struct {
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const Self = @This();
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/// Write-only
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/// NR41
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len: u6,
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envelope: io.Envelope,
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poly: io.PolyCounter,
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cnt: io.NoiseControl,
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fn init() Self {
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return .{
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.len = 0,
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.envelope = .{ .raw = 0 },
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.poly = .{ .raw = 0 },
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.cnt = .{ .raw = 0 },
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};
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}
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};
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const DmaSound = struct {
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const Self = @This();
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a: SoundFifo,
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b: SoundFifo,
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fn init() Self {
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return .{
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.a = SoundFifo.init(),
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.b = SoundFifo.init(),
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};
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}
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};
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174
src/bus/io.zig
174
src/bus/io.zig
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@ -150,7 +150,7 @@ pub fn read16(bus: *const Bus, addr: u32) u16 {
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0x0400_0006 => bus.ppu.vcount.raw,
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// Sound
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0x0400_0088 => unimplementedRead("Read halfword from SOUNDBIAS", .{}),
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0x0400_0088 => bus.apu.bias.raw,
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// Timers
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0x0400_0100 => bus.io.tim0.counter(),
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@ -210,10 +210,10 @@ pub fn write16(bus: *Bus, addr: u32, halfword: u16) void {
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0x0400_0054 => log.warn("Wrote 0x{X:0>4} to BLDY", .{halfword}),
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// Sound
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0x0400_0080 => log.warn("Wrote 0x{X:0>4} to SOUNDCNT_L", .{halfword}),
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0x0400_0082 => log.warn("Wrote 0x{X:0>4} to SOUNDCNT_H", .{halfword}),
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0x0400_0084 => log.warn("Wrote 0x{X:0>4} to SOUNDCNT_X", .{halfword}),
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0x0400_0088 => log.warn("Wrote 0x{X:0>4} to SOUNDBIAS", .{halfword}),
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0x0400_0080 => bus.apu.ch_vol_cnt.raw = halfword,
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0x0400_0082 => bus.apu.dma_cnt.raw = halfword,
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0x0400_0084 => bus.apu.setSoundCntX(halfword >> 7 & 1 == 1),
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0x0400_0088 => bus.apu.bias.raw = halfword,
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// Dma Transfers
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0x0400_00B8 => bus.io.dma0.writeWordCount(halfword),
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@ -267,7 +267,7 @@ pub fn read8(bus: *const Bus, addr: u32) u8 {
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0x0400_0006 => @truncate(u8, bus.ppu.vcount.raw),
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// Sound
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0x0400_0089 => unimplementedRead("Read (high) byte from SOUNDBIAS", .{}),
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0x0400_0089 => @truncate(u8, bus.apu.bias.raw >> 8),
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// Serial Communication 1
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0x0400_0128 => unimplementedRead("Read (low) byte from SIOCNT", .{}),
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@ -279,23 +279,23 @@ pub fn read8(bus: *const Bus, addr: u32) u8 {
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};
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}
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pub fn write8(self: *Bus, addr: u32, byte: u8) void {
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pub fn write8(bus: *Bus, addr: u32, byte: u8) void {
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switch (addr) {
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// Display
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0x0400_0004 => self.ppu.dispstat.raw = (self.ppu.dispstat.raw & 0xFF00) | byte,
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0x0400_0005 => self.ppu.dispstat.raw = (@as(u16, byte) << 8) | (self.ppu.dispstat.raw & 0xFF),
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0x0400_0004 => bus.ppu.dispstat.raw = (bus.ppu.dispstat.raw & 0xFF00) | byte,
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0x0400_0005 => bus.ppu.dispstat.raw = (@as(u16, byte) << 8) | (bus.ppu.dispstat.raw & 0xFF),
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// Sound
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0x0400_0063 => log.warn("Wrote 0x{X:0>2} to SOUND1CNT_H (high)", .{byte}),
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0x0400_0065 => log.warn("Wrote 0x{X:0>2} to SOUND1CNT_X (high)", .{byte}),
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0x0400_0069 => log.warn("Wrote 0x{X:0>2} to SOUND2CNT_L (high)", .{byte}),
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0x0400_006D => log.warn("Wrote 0x{X:0>2} to SOUND2CNT_H (high)", .{byte}),
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0x0400_0070 => log.warn("Wrote 0x{X:0>2} to SOUND3CNT_L (low)", .{byte}),
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0x0400_0079 => log.warn("Wrote 0x{X:0>2} to SOUND4CNT_L (high)", .{byte}),
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0x0400_007D => log.warn("Wrote 0x{X:0>2} to SOUND4CNT_H (high)", .{byte}),
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0x0400_0080 => log.warn("Wrote 0x{X:0>2} to SOUNDCNT_L (low)", .{byte}),
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0x0400_0084 => log.warn("Wrote 0x{X:0>2} to SOUNDCNT_X (low)", .{byte}),
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0x0400_0089 => log.warn("Wrote 0x{X:0>2} to SOUNDBIAS (high)", .{byte}),
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0x0400_0063 => bus.apu.ch1.envelope.raw = byte,
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0x0400_0065 => bus.apu.ch1.setFreqHigh(byte),
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0x0400_0069 => bus.apu.ch2.envelope.raw = byte,
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0x0400_006D => bus.apu.ch2.setFreqHigh(byte),
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0x0400_0070 => bus.apu.ch3.select.raw = byte,
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0x0400_0079 => bus.apu.ch4.envelope.raw = byte,
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0x0400_007D => bus.apu.ch4.cnt.raw = byte,
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0x0400_0080 => bus.apu.setSoundCntLLow(byte),
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0x0400_0084 => bus.apu.setSoundCntX(byte >> 7 & 1 == 1),
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0x0400_0089 => bus.apu.setBiasHigh(byte),
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// Serial Communication 1
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0x0400_0128 => log.warn("Wrote 0x{X:0>2} to SIOCNT (low)", .{byte}),
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@ -304,8 +304,8 @@ pub fn write8(self: *Bus, addr: u32, byte: u8) void {
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0x0400_0140 => log.warn("Wrote 0x{X:0>2} to JOYCNT (low)", .{byte}),
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// Interrupts
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0x0400_0208 => self.io.ime = byte & 1 == 1,
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0x0400_0301 => self.io.haltcnt = if (byte >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
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0x0400_0208 => bus.io.ime = byte & 1 == 1,
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0x0400_0301 => bus.io.haltcnt = if (byte >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
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else => undWrite("Tried to write 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }),
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}
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}
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@ -462,3 +462,135 @@ pub const TimerControl = extern union {
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enabled: Bit(u16, 7),
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raw: u16,
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};
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/// Read / Write
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/// NR10
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pub const Sweep = extern union {
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shift: Bitfield(u8, 0, 3),
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direction: Bit(u8, 3),
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period: Bitfield(u8, 4, 3),
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raw: u8,
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};
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/// Read / Write
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/// This represents the Duty / Len
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/// NRx1
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pub const Duty = extern union {
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/// Write-only
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/// Only used when bit 6 is set
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length: Bitfield(u16, 0, 6),
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pattern: Bitfield(u16, 6, 2),
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raw: u8,
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};
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/// Read / Write
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/// NRx2
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pub const Envelope = extern union {
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period: Bitfield(u8, 0, 3),
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direction: Bit(u8, 3),
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init_vol: Bitfield(u8, 4, 4),
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raw: u8,
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};
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/// Read / Write
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/// NRx3, NRx4
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pub const Frequency = extern union {
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/// Write-only
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frequency: Bitfield(u16, 0, 11),
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length_enable: Bit(u16, 14),
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/// Write-only
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trigger: Bit(u16, 15),
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raw: u16,
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};
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/// Read / Write
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/// NR30
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pub const WaveSelect = extern union {
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dimension: Bit(u8, 5),
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bank: Bit(u8, 6),
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enabled: Bit(u8, 7),
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raw: u8,
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};
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/// Read / Write
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/// NR32
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pub const WaveVolume = extern union {
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kind: Bitfield(u8, 5, 2),
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force: Bit(u8, 7),
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raw: u8,
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};
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/// Read / Write
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/// NR43
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pub const PolyCounter = extern union {
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div_ratio: Bitfield(u8, 0, 3),
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width: Bit(u8, 3),
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shift: Bitfield(u8, 4, 4),
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raw: u8,
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};
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/// Read / Write
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/// NR44
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pub const NoiseControl = extern union {
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length_enable: Bit(u8, 6),
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trigger: Bit(u8, 7),
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raw: u8,
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};
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/// Read / Write
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pub const ChannelVolumeControl = extern union {
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left_vol: Bitfield(u16, 0, 3),
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right_vol: Bitfield(u16, 4, 3),
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ch1_right: Bit(u16, 8),
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ch2_right: Bit(u16, 9),
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ch3_right: Bit(u16, 10),
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ch4_right: Bit(u16, 11),
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ch1_left: Bit(u16, 12),
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ch2_left: Bit(u16, 13),
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ch3_left: Bit(u16, 14),
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ch4_left: Bit(u16, 15),
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raw: u16,
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};
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/// Read / Write
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pub const DmaSoundControl = extern union {
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ch_vol: Bitfield(u16, 0, 2),
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sa_vol: Bit(u16, 2),
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sb_vol: Bit(u16, 3),
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sa_right_enable: Bit(u16, 8),
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sa_left_enable: Bit(u16, 9),
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sa_timer: Bit(u16, 10),
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/// Write only?
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sa_reset: Bit(u16, 11),
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sb_right_enable: Bit(u16, 12),
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sb_left_enable: Bit(u16, 13),
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sb_timer: Bit(u16, 14),
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/// Write only?
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sb_reset: Bit(u16, 15),
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raw: u16,
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};
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/// Read / Write
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pub const SoundControl = extern union {
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/// Read-only
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ch1_enable: Bit(u8, 0),
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/// Read-only
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ch2_enable: Bit(u8, 1),
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/// Read-only
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ch3_enable: Bit(u8, 2),
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/// Read-only
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ch4_enable: Bit(u8, 3),
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apu_enable: Bit(u8, 7),
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raw: u8,
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};
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/// Read / Write
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pub const SoundBias = extern union {
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level: Bitfield(u16, 1, 9),
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sampling_cycle: Bitfield(u16, 14, 2),
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raw: u16,
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};
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