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feat(bus): add Io Struct 

Also, add more information to all panic messages
This commit is contained in:
Rekai Nyangadzayi Musuka 2022-01-02 14:40:49 -06:00
parent 01d6399dfb
commit 1c42d1795a
6 changed files with 109 additions and 50 deletions
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87
src/bus.zig
View File

@ -1,5 +1,6 @@
const std = @import("std"); const std = @import("std");
const Io = @import("bus/io.zig").Io;
const Bios = @import("bus/bios.zig").Bios; const Bios = @import("bus/bios.zig").Bios;
const GamePak = @import("bus/pak.zig").GamePak; const GamePak = @import("bus/pak.zig").GamePak;
const Allocator = std.mem.Allocator; const Allocator = std.mem.Allocator;
@ -7,12 +8,14 @@ const Allocator = std.mem.Allocator;
pub const Bus = struct { pub const Bus = struct {
pak: GamePak, pak: GamePak,
bios: Bios, bios: Bios,
io: Io,
pub fn init(alloc: Allocator, path: []const u8) !@This() { pub fn init(alloc: Allocator, path: []const u8) !@This() {
return @This(){ return @This(){
.pak = try GamePak.init(alloc, path), .pak = try GamePak.init(alloc, path),
// TODO: don't hardcode this + bundle open-sorce Boot ROM // TODO: don't hardcode this + bundle open-sorce Boot ROM
.bios = try Bios.init(alloc, "./bin/gba_bios.bin"), .bios = try Bios.init(alloc, "./bin/gba_bios.bin"),
.io = Io.init(),
}; };
} }
@ -20,14 +23,14 @@ pub const Bus = struct {
return switch (addr) { return switch (addr) {
// General Internal Memory // General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get32(@as(usize, addr)), 0x0000_0000...0x0000_3FFF => self.bios.get32(@as(usize, addr)),
0x0200_0000...0x0203FFFF => std.debug.panic("read32 from 0x{X:} in IWRAM", .{addr}), 0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:32] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("read32 from 0x{X:} in EWRAM", .{addr}), 0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:32] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => std.debug.panic("read32 from 0x{X:} in I/O", .{addr}), 0x0400_0000...0x0400_03FE => self.read32(addr),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x0500_03FF => std.debug.panic("read32 from 0x{X:} in BG/OBJ Palette RAM", .{addr}), 0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:32] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
0x0600_0000...0x0601_7FFF => std.debug.panic("read32 from 0x{X:} in VRAM", .{addr}), 0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:32] read from 0x{X:} in VRAM", .{addr}),
0x0700_0000...0x0700_03FF => std.debug.panic("read32 from 0x{X:} in OAM", .{addr}), 0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak) // External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get32(@as(usize, addr - 0x0800_0000)), 0x0800_0000...0x09FF_FFFF => self.pak.get32(@as(usize, addr - 0x0800_0000)),
@ -35,7 +38,7 @@ pub const Bus = struct {
0x0C00_0000...0x0DFF_FFFF => self.pak.get32(@as(usize, addr - 0x0C00_0000)), 0x0C00_0000...0x0DFF_FFFF => self.pak.get32(@as(usize, addr - 0x0C00_0000)),
else => { else => {
std.log.warn("ZBA tried to read32 from 0x{X:}", .{addr}); std.log.warn("[Bus:32] ZBA tried to read from 0x{X:}", .{addr});
return 0x0000_0000; return 0x0000_0000;
}, },
}; };
@ -46,16 +49,16 @@ pub const Bus = struct {
switch (addr) { switch (addr) {
// General Internal Memory // General Internal Memory
0x0200_0000...0x0203FFFF => std.debug.panic("write32 0x{X:} to 0x{X:} in IWRAM", .{ word, addr }), 0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in IWRAM", .{ word, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("write32 0x{X:} to 0x{X:} in EWRAM", .{ word, addr }), 0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in EWRAM", .{ word, addr }),
0x0400_0000...0x0400_03FE => std.debug.panic("write32 0x{X:} to 0x{X:} in I/O", .{ word, addr }), 0x0400_0000...0x0400_03FE => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in I/O", .{ word, addr }),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x0500_03FF => std.debug.panic("write32 0x{X:} to 0x{X:} in BG/OBJ Palette RAM", .{ word, addr }), 0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in BG/OBJ Palette RAM", .{ word, addr }),
0x0600_0000...0x0601_7FFF => std.debug.panic("write32 0x{X:} to 0x{X:} in VRAM", .{ word, addr }), 0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in VRAM", .{ word, addr }),
0x0700_0000...0x0700_03FF => std.debug.panic("write32 0x{X:} to 0x{X:} in OAM", .{ word, addr }), 0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in OAM", .{ word, addr }),
else => std.log.warn("ZBA tried to write32 0x{X:} to 0x{X:}", .{ word, addr }), else => std.log.warn("[Bus:32] ZBA tried to write 0x{X:} to 0x{X:}", .{ word, addr }),
} }
} }
@ -63,14 +66,14 @@ pub const Bus = struct {
return switch (addr) { return switch (addr) {
// General Internal Memory // General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get16(@as(usize, addr)), 0x0000_0000...0x0000_3FFF => self.bios.get16(@as(usize, addr)),
0x0200_0000...0x0203FFFF => std.debug.panic("read16 from 0x{X:} in IWRAM", .{addr}), 0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:16] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("read16 from 0x{X:} in EWRAM", .{addr}), 0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:16] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => std.debug.panic("read16 from 0x{X:} in I/O", .{addr}), 0x0400_0000...0x0400_03FE => self.io.read16(addr),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x0500_03FF => std.debug.panic("read16 from 0x{X:} in BG/OBJ Palette RAM", .{addr}), 0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:16] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
0x0600_0000...0x0601_7FFF => std.debug.panic("read16 from 0x{X:} in VRAM", .{addr}), 0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:16] read from 0x{X:} in VRAM", .{addr}),
0x0700_0000...0x0700_03FF => std.debug.panic("read16 from 0x{X:} in OAM", .{addr}), 0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak) // External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get16(@as(usize, addr - 0x0800_0000)), 0x0800_0000...0x09FF_FFFF => self.pak.get16(@as(usize, addr - 0x0800_0000)),
@ -78,27 +81,27 @@ pub const Bus = struct {
0x0C00_0000...0x0DFF_FFFF => self.pak.get16(@as(usize, addr - 0x0C00_0000)), 0x0C00_0000...0x0DFF_FFFF => self.pak.get16(@as(usize, addr - 0x0C00_0000)),
else => { else => {
std.log.warn("ZBA tried to read16 from 0x{X:}", .{addr}); std.log.warn("[Bus:16] ZBA tried to read from 0x{X:}", .{addr});
return 0x0000; return 0x0000;
}, },
}; };
} }
pub fn write16(_: *@This(), addr: u32, halfword: u16) void { pub fn write16(self: *@This(), addr: u32, halfword: u16) void {
// TODO: write16 can write to GamePak Flash // TODO: write16 can write to GamePak Flash
switch (addr) { switch (addr) {
// General Internal Memory // General Internal Memory
0x0200_0000...0x0203FFFF => std.debug.panic("write16 0x{X:} to 0x{X:} in IWRAM", .{ halfword, addr }), 0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in IWRAM", .{ halfword, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("write16 0x{X:} to 0x{X:} in EWRAM", .{ halfword, addr }), 0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in EWRAM", .{ halfword, addr }),
0x0400_0000...0x0400_03FE => std.debug.panic("write16 0x{X:} to 0x{X:} in I/O", .{ halfword, addr }), 0x0400_0000...0x0400_03FE => self.io.write16(addr, halfword),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x0500_03FF => std.debug.panic("write16 0x{X:} to 0x{X:} in BG/OBJ Palette RAM", .{ halfword, addr }), 0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in BG/OBJ Palette RAM", .{ halfword, addr }),
0x0600_0000...0x0601_7FFF => std.debug.panic("write16 0x{X:} to 0x{X:} in VRAM", .{ halfword, addr }), 0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in VRAM", .{ halfword, addr }),
0x0700_0000...0x0700_03FF => std.debug.panic("write16 0x{X:} to 0x{X:} in OAM", .{ halfword, addr }), 0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in OAM", .{ halfword, addr }),
else => std.log.warn("ZBA tried to write16 0x{X:} to 0x{X:}", .{ halfword, addr }), else => std.log.warn("[Bus:16] ZBA tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
} }
} }
@ -106,23 +109,23 @@ pub const Bus = struct {
return switch (addr) { return switch (addr) {
// General Internal Memory // General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get8(@as(usize, addr)), 0x0000_0000...0x0000_3FFF => self.bios.get8(@as(usize, addr)),
0x0200_0000...0x0203FFFF => std.debug.panic("read8 from 0x{X:} in IWRAM", .{addr}), 0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:8] read from 0x{X:} in IWRAM", .{addr}),
0x0300_0000...0x0300_7FFF => std.debug.panic("read8 from 0x{X:} in EWRAM", .{addr}), 0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:8] read from 0x{X:} in EWRAM", .{addr}),
0x0400_0000...0x0400_03FE => std.debug.panic("read8 from 0x{X:} in I/O", .{addr}), 0x0400_0000...0x0400_03FE => self.io.read8(addr),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x0500_03FF => std.debug.panic("read8 from 0x{X:} in BG/OBJ Palette RAM", .{addr}), 0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:8] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
0x0600_0000...0x0601_7FFF => std.debug.panic("read8 from 0x{X:} in VRAM", .{addr}), 0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:8] read from 0x{X:} in VRAM", .{addr}),
0x0700_0000...0x0700_03FF => std.debug.panic("read8 from 0x{X:} in OAM", .{addr}), 0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:8] read from 0x{X:} in OAM", .{addr}),
// External Memory (Game Pak) // External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get8(@as(usize, addr - 0x0800_0000)), 0x0800_0000...0x09FF_FFFF => self.pak.get8(@as(usize, addr - 0x0800_0000)),
0x0A00_0000...0x0BFF_FFFF => self.pak.get8(@as(usize, addr - 0x0A00_0000)), 0x0A00_0000...0x0BFF_FFFF => self.pak.get8(@as(usize, addr - 0x0A00_0000)),
0x0C00_0000...0x0DFF_FFFF => self.pak.get8(@as(usize, addr - 0x0C00_0000)), 0x0C00_0000...0x0DFF_FFFF => self.pak.get8(@as(usize, addr - 0x0C00_0000)),
0x0E00_0000...0x0E00_FFFF => std.debug.panic("read8 from 0x{X:} in Game Pak SRAM", .{addr}), 0x0E00_0000...0x0E00_FFFF => std.debug.panic("[Bus:8] read from 0x{X:} in Game Pak SRAM", .{addr}),
else => { else => {
std.log.warn("ZBA tried to read8 from 0x{X:}", .{addr}); std.log.warn("[Bus:8] ZBA tried to read from 0x{X:}", .{addr});
return 0x00; return 0x00;
}, },
}; };
@ -131,13 +134,13 @@ pub const Bus = struct {
pub fn write8(_: *@This(), addr: u32, byte: u8) void { pub fn write8(_: *@This(), addr: u32, byte: u8) void {
switch (addr) { switch (addr) {
// General Internal Memory // General Internal Memory
0x0200_0000...0x0203FFFF => std.debug.panic("write8 0x{X:} to 0x{X:} in IWRAM", .{ byte, addr }), 0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in IWRAM", .{ byte, addr }),
0x0300_0000...0x0300_7FFF => std.debug.panic("write8 0x{X:} to 0x{X:} in EWRAM", .{ byte, addr }), 0x0300_0000...0x0300_7FFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in EWRAM", .{ byte, addr }),
0x0400_0000...0x0400_03FE => std.debug.panic("write8 0x{X:} to 0x{X:} in I/O", .{ byte, addr }), 0x0400_0000...0x0400_03FE => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in I/O", .{ byte, addr }),
// External Memory (Game Pak) // External Memory (Game Pak)
0x0E00_0000...0x0E00_FFFF => std.debug.panic("write8 0x{X:} to 0x{X:} in Game Pak SRAM", .{ byte, addr }), 0x0E00_0000...0x0E00_FFFF => std.debug.panic("[Bus:8] write 0x{X:} to 0x{X:} in Game Pak SRAM", .{ byte, addr }),
else => std.log.warn("ZBA tried to write8 0x{X:} to 0x{X:}", .{ byte, addr }), else => std.log.warn("[Bus:8] ZBA tried to write 0x{X:} to 0x{X:}", .{ byte, addr }),
} }
} }
}; };

56
src/bus/io.zig Normal file
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@ -0,0 +1,56 @@
const std = @import("std");
const bitfield = @import("bitfield");
const Bitfield = bitfield.Bitfield;
const Bit = bitfield.Bit;
pub const Io = struct {
dispcnt: Dispcnt,
pub fn init() @This() {
return .{
.dispcnt = .{ .val = 0x0000_0000 },
};
}
pub fn read32(self: *const @This(), addr: u32) u32 {
return switch (addr) {
0x0400_0000 => @as(u32, self.dispcnt.val),
else => std.debug.panic("[I/O:32] tried to read from {X:}", .{addr}),
};
}
pub fn read16(self: *const @This(), addr: u32) u16 {
return switch (addr) {
0x0400_0000 => self.dispcnt.val,
else => std.debug.panic("[I/O:16] tried to read from {X:}", .{addr}),
};
}
pub fn write16(self: *@This(), addr: u32, halfword: u16) void {
switch (addr) {
0x0400_000 => self.dispcnt.val = halfword,
else => std.debug.panic("[I/O:16] tried to write {X:} to {X:}", .{ halfword, addr }),
}
}
pub fn read8(self: *const @This(), addr: u32) u8 {
return switch (addr) {
0x0400_0000 => @truncate(u8, self.dispcnt.val),
else => std.debug.panic("[I/O:8] tried to read from {X:}", .{addr}),
};
}
};
const Dispcnt = extern union {
bg_mode: Bitfield(u16, 0, 3),
frame_select: Bit(u16, 4),
hblank_interval_free: Bit(u16, 5),
obj_mapping: Bit(u16, 6),
forced_blank: Bit(u16, 7),
bg_enable: Bitfield(u16, 8, 4),
obj_enable: Bit(u16, 12),
win_enable: Bitfield(u16, 13, 2),
obj_win_enable: Bit(u16, 15),
val: u16,
};

4
src/cpu.zig
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@ -71,7 +71,7 @@ fn checkCond(cpsr: *const CPSR, opcode: u32) bool {
0xC => !cpsr.z.read() and (cpsr.n.read() == cpsr.z.read()), // GT - Greater than 0xC => !cpsr.z.read() and (cpsr.n.read() == cpsr.z.read()), // GT - Greater than
0xD => cpsr.z.read() or (cpsr.n.read() != cpsr.v.read()), // LE - Less than or equal 0xD => cpsr.z.read() or (cpsr.n.read() != cpsr.v.read()), // LE - Less than or equal
0xE => true, // AL - Always 0xE => true, // AL - Always
0xF => std.debug.panic("0xF is a reserved condition field", .{}), 0xF => std.debug.panic("[CPU] 0xF is a reserved condition field", .{}),
}; };
} }
@ -145,7 +145,7 @@ const Mode = enum(u5) {
fn undefinedInstruction(_: *Arm7tdmi, _: *Bus, opcode: u32) void { fn undefinedInstruction(_: *Arm7tdmi, _: *Bus, opcode: u32) void {
const id = armIdx(opcode); const id = armIdx(opcode);
std.debug.panic("[0x{X:}] 0x{X:} is an illegal opcode", .{ id, opcode }); std.debug.panic("[CPU] {{0x{X:}}} 0x{X:} is an illegal opcode", .{ id, opcode });
} }
fn comptimeBranch(comptime L: bool) InstrFn { fn comptimeBranch(comptime L: bool) InstrFn {

6
src/cpu/data_processing.zig
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@ -23,13 +23,13 @@ pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instr
// ADD // ADD
cpu.r[rd] = cpu.r[op1] + op2; cpu.r[rd] = cpu.r[op1] + op2;
if (S) std.debug.panic("TODO: implement ADD condition codes", .{}); if (S) std.debug.panic("[CPU] TODO: implement ADD condition codes", .{});
}, },
0xD => { 0xD => {
// MOV // MOV
cpu.r[rd] = op2; cpu.r[rd] = op2;
if (S) std.debug.panic("TODO: implement MOV condition codes", .{}); if (S) std.debug.panic("[CPU] implement MOV condition codes", .{});
}, },
0xA => { 0xA => {
// CMP // CMP
@ -45,7 +45,7 @@ pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instr
cpu.cpsr.z.write(result == 0x00); cpu.cpsr.z.write(result == 0x00);
cpu.cpsr.n.write(result >> 31 & 0x01 == 0x01); cpu.cpsr.n.write(result >> 31 & 0x01 == 0x01);
}, },
else => std.debug.panic("TODO: implement data processing type {}", .{instrKind}), else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
} }
} }
}.dataProcessing; }.dataProcessing;

4
src/cpu/half_signed_data_transfer.zig
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@ -30,7 +30,7 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
switch (@truncate(u2, opcode >> 5)) { switch (@truncate(u2, opcode >> 5)) {
0b00 => { 0b00 => {
// SWP // SWP
std.debug.panic("TODO: Implement SWP", .{}); std.debug.panic("[CPU] TODO: Implement SWP", .{});
}, },
0b01 => { 0b01 => {
// LDRH // LDRH
@ -56,7 +56,7 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
bus.write16(address + 2, src); bus.write16(address + 2, src);
bus.write16(address, src); bus.write16(address, src);
} else { } else {
std.debug.panic("TODO Figure out if this is also SWP", .{}); std.debug.panic("[CPU] TODO: Figure out if this is also SWP", .{});
} }
} }

2
src/scheduler.zig
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@ -29,7 +29,7 @@ pub const Scheduler = struct {
switch (event.kind) { switch (event.kind) {
.HeatDeath => { .HeatDeath => {
std.debug.panic("Somehow, a u64 overflowed", .{}); std.debug.panic("[Scheduler] Somehow, a u64 overflowed", .{});
}, },
} }
} }