feat(cpu): implement ARM SWP and SWPB
This commit is contained in:
89
src/cpu.zig
89
src/cpu.zig
@@ -19,6 +19,7 @@ const branchAndExchange = @import("cpu/arm/branch.zig").branchAndExchange;
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const softwareInterrupt = @import("cpu/arm/software_interrupt.zig").softwareInterrupt;
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const multiply = @import("cpu/arm/multiply.zig").multiply;
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const multiplyLong = @import("cpu/arm/multiply_long.zig").multiplyLong;
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const singleDataSwap = @import("cpu/arm/single_data_swap.zig").singleDataSwap;
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// THUMB Instruction Groups
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const format1 = @import("cpu/thumb/format1.zig").format1;
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@@ -491,33 +492,35 @@ fn thumbPopulate() [0x400]ThumbInstrFn {
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fn armPopulate() [0x1000]ArmInstrFn {
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return comptime {
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@setEvalBranchQuota(0x5000); // TODO: Figure out exact size
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@setEvalBranchQuota(0xC000); // TODO: Figure out exact size
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var lut = [_]ArmInstrFn{armUndefined} ** 0x1000;
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var i: usize = 0;
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while (i < lut.len) : (i += 1) {
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if (i >> 10 & 0x3 == 0b00) {
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const I = i >> 9 & 1 == 1;
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const S = i >> 4 & 1 == 1;
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const instrKind = i >> 5 & 0xF;
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lut[i] = dataProcessing(I, S, instrKind);
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}
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if (i >> 10 & 0x3 == 0b00 and i >> 7 & 0x3 == 0b10 and i >> 4 & 1 == 0) {
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// PSR Transfer
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const I = i >> 9 & 1 == 1;
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const R = i >> 6 & 1 == 1;
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const kind = i >> 4 & 0x3;
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lut[i] = psrTransfer(I, R, kind);
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}
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// Instructions with Opcode[27] == 0
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if (i == 0x121) {
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// Bits 27:20 and 7:4
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lut[i] = branchAndExchange;
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}
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} else if (i >> 6 & 0x3F == 0b000000 and i & 0xF == 0b1001) {
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// Bits 27:22 and 7:4
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const A = i >> 5 & 1 == 1;
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const S = i >> 4 & 1 == 1;
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if (i >> 9 & 0x7 == 0b000 and i >> 3 & 1 == 1 and i & 1 == 1) {
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lut[i] = multiply(A, S);
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} else if (i >> 7 & 0x1F == 0b00010 and i >> 4 & 0x3 == 0b00 and i & 0xF == 0b1001) {
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// Bits 27:23, 21:20 and 7:4
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const B = i >> 6 & 1 == 1;
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lut[i] = singleDataSwap(B);
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} else if (i >> 7 & 0x1F == 0b00001 and i & 0xF == 0b1001) {
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// Bits 27:23 and bits 7:4
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const U = i >> 6 & 1 == 1;
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const A = i >> 5 & 1 == 1;
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const S = i >> 4 & 1 == 1;
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lut[i] = multiplyLong(U, A, S);
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} else if (i >> 9 & 0x7 == 0b000 and i >> 3 & 1 == 1 and i & 1 == 1) {
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// Bits 27:25, 7 and 4
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const P = i >> 8 & 1 == 1;
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const U = i >> 7 & 1 == 1;
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const I = i >> 6 & 1 == 1;
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@@ -525,24 +528,18 @@ fn armPopulate() [0x1000]ArmInstrFn {
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const L = i >> 4 & 1 == 1;
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lut[i] = halfAndSignedDataTransfer(P, U, I, W, L);
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}
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} else if (i >> 9 & 0x7 == 0b011 and i & 1 == 1) {
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// Bits 27:25 and 4
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lut[i] = armUndefined;
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} else if (i >> 10 & 0x3 == 0b00 and i >> 7 & 0x3 == 0b10 and i >> 4 & 1 == 0) {
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// Bits 27:26, 24:23 and 20
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const I = i >> 9 & 1 == 1;
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const R = i >> 6 & 1 == 1;
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const kind = i >> 4 & 0x3;
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if (i >> 6 & 0x3F == 0b000000 and i & 0xF == 0b1001) {
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const A = i >> 5 & 1 == 1;
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const S = i >> 4 & 1 == 1;
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lut[i] = multiply(A, S);
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}
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if (i >> 7 & 0x1F == 0b00001 and i & 0xF == 0b1001) {
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const U = i >> 6 & 1 == 1;
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const A = i >> 5 & 1 == 1;
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const S = i >> 4 & 1 == 1;
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lut[i] = multiplyLong(U, A, S);
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}
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if (i >> 10 & 0x3 == 0b01) {
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lut[i] = psrTransfer(I, R, kind);
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} else if (i >> 10 & 0x3 == 0b01) {
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// Bits 27:26
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const I = i >> 9 & 1 == 1;
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const P = i >> 8 & 1 == 1;
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const U = i >> 7 & 1 == 1;
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@@ -551,9 +548,18 @@ fn armPopulate() [0x1000]ArmInstrFn {
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const L = i >> 4 & 1 == 1;
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lut[i] = singleDataTransfer(I, P, U, B, W, L);
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} else if (i >> 10 & 0x3 == 0b00) {
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// Bits 27:26
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const I = i >> 9 & 1 == 1;
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const S = i >> 4 & 1 == 1;
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const instrKind = i >> 5 & 0xF;
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lut[i] = dataProcessing(I, S, instrKind);
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}
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// Instructions with Opcode[27] == 1
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if (i >> 9 & 0x7 == 0b100) {
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// Bits 27:25
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const P = i >> 8 & 1 == 1;
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const U = i >> 7 & 1 == 1;
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const S = i >> 6 & 1 == 1;
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@@ -561,14 +567,11 @@ fn armPopulate() [0x1000]ArmInstrFn {
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const L = i >> 4 & 1 == 1;
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lut[i] = blockDataTransfer(P, U, S, W, L);
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}
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if (i >> 9 & 0x7 == 0b101) {
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} else if (i >> 9 & 0x7 == 0b101) {
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// Bits 27:25
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const L = i >> 8 & 1 == 1;
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lut[i] = branch(L);
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}
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if (i >> 8 & 0xF == 0b1111) lut[i] = softwareInterrupt();
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} else if (i >> 8 & 0xF == 0b1111) lut[i] = softwareInterrupt(); // Bits 27:24
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}
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return lut;
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