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fix: respond to `@addWithOverflow` changes in latest zig

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-12-28 14:52:12 -06:00
parent 0cec779545
commit 0f148507e4
3 changed files with 30 additions and 22 deletions
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30
src/core/cpu/arm/data_processing.zig
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@ -24,7 +24,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4; if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4;
var result: u32 = undefined; var result: u32 = undefined;
var overflow: bool = undefined; var overflow: u1 = undefined;
// Perform Data Processing Logic // Perform Data Processing Logic
switch (kind) { switch (kind) {
@ -62,7 +62,9 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
if (rd == 0xF) if (rd == 0xF)
return undefinedTestBehaviour(cpu); return undefinedTestBehaviour(cpu);
overflow = @addWithOverflow(u32, op1, op2, &result); const tmp = @addWithOverflow(op1, op2);
result = tmp[0];
overflow = tmp[1];
}, },
0xC => result = op1 | op2, // ORR 0xC => result = op1 | op2, // ORR
0xD => result = op2, // MOV 0xD => result = op2, // MOV
@ -110,7 +112,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
// ADD, ADC Flags // ADD, ADC Flags
cpu.cpsr.n.write(result >> 31 & 1 == 1); cpu.cpsr.n.write(result >> 31 & 1 == 1);
cpu.cpsr.z.write(result == 0); cpu.cpsr.z.write(result == 0);
cpu.cpsr.c.write(overflow); cpu.cpsr.c.write(overflow == 0b1);
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1); cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
}, },
0x6, 0x7 => if (S and rd != 0xF) { 0x6, 0x7 => if (S and rd != 0xF) {
@ -141,7 +143,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) Ins
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1); cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
} else if (kind == 0xB) { } else if (kind == 0xB) {
// CMN specific // CMN specific
cpu.cpsr.c.write(overflow); cpu.cpsr.c.write(overflow == 0b1);
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1); cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
} else { } else {
// TST, TEQ specific // TST, TEQ specific
@ -162,19 +164,19 @@ pub fn sbc(left: u32, right: u32, old_carry: u1) u32 {
return ret; return ret;
} }
pub fn add(overflow: *bool, left: u32, right: u32) u32 { pub fn add(overflow: *u1, left: u32, right: u32) u32 {
var ret: u32 = undefined; const ret = @addWithOverflow(left, right);
overflow.* = @addWithOverflow(u32, left, right, &ret); overflow.* = ret[1];
return ret;
return ret[0];
} }
pub fn adc(overflow: *bool, left: u32, right: u32, old_carry: u1) u32 { pub fn adc(overflow: *u1, left: u32, right: u32, old_carry: u1) u32 {
var ret: u32 = undefined; const tmp = @addWithOverflow(left, right);
const first = @addWithOverflow(u32, left, right, &ret); const ret = @addWithOverflow(tmp[0], old_carry);
const second = @addWithOverflow(u32, ret, old_carry, &ret); overflow.* = tmp[1] | ret[1];
overflow.* = first or second; return ret[0];
return ret;
} }
fn undefinedTestBehaviour(cpu: *Arm7tdmi) void { fn undefinedTestBehaviour(cpu: *Arm7tdmi) void {

12
src/core/cpu/thumb/alu.zig
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@ -21,7 +21,8 @@ pub fn fmt4(comptime op: u4) InstrFn {
const op2 = cpu.r[rs]; const op2 = cpu.r[rs];
var result: u32 = undefined; var result: u32 = undefined;
var overflow: bool = undefined; var overflow: u1 = undefined;
switch (op) { switch (op) {
0x0 => result = op1 & op2, // AND 0x0 => result = op1 & op2, // AND
0x1 => result = op1 ^ op2, // EOR 0x1 => result = op1 ^ op2, // EOR
@ -34,7 +35,12 @@ pub fn fmt4(comptime op: u4) InstrFn {
0x8 => result = op1 & op2, // TST 0x8 => result = op1 & op2, // TST
0x9 => result = 0 -% op2, // NEG 0x9 => result = 0 -% op2, // NEG
0xA => result = op1 -% op2, // CMP 0xA => result = op1 -% op2, // CMP
0xB => overflow = @addWithOverflow(u32, op1, op2, &result), // CMN 0xB => {
// CMN
const tmp = @addWithOverflow(op1, op2);
result = tmp[0];
overflow = tmp[1];
},
0xC => result = op1 | op2, // ORR 0xC => result = op1 | op2, // ORR
0xD => result = @truncate(u32, @as(u64, op2) * @as(u64, op1)), 0xD => result = @truncate(u32, @as(u64, op2) * @as(u64, op1)),
0xE => result = op1 & ~op2, 0xE => result = op1 & ~op2,
@ -71,7 +77,7 @@ pub fn fmt4(comptime op: u4) InstrFn {
// ADC, CMN // ADC, CMN
cpu.cpsr.n.write(result >> 31 & 1 == 1); cpu.cpsr.n.write(result >> 31 & 1 == 1);
cpu.cpsr.z.write(result == 0); cpu.cpsr.z.write(result == 0);
cpu.cpsr.c.write(overflow); cpu.cpsr.c.write(overflow == 0b1);
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1); cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
}, },
0x6 => { 0x6 => {

10
src/core/cpu/thumb/data_processing.zig
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@ -64,7 +64,7 @@ pub fn fmt5(comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
const op2 = cpu.r[rs]; const op2 = cpu.r[rs];
var result: u32 = undefined; var result: u32 = undefined;
var overflow: bool = undefined; var overflow: u1 = undefined;
switch (op) { switch (op) {
0b00 => result = add(&overflow, op1, op2), // ADD 0b00 => result = add(&overflow, op1, op2), // ADD
0b01 => result = op1 -% op2, // CMP 0b01 => result = op1 -% op2, // CMP
@ -126,13 +126,13 @@ pub fn fmt2(comptime I: bool, is_sub: bool, rn: u3) InstrFn {
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1); cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
} else { } else {
// ADD // ADD
var overflow: bool = undefined; var overflow: u1 = undefined;
const result = add(&overflow, op1, op2); const result = add(&overflow, op1, op2);
cpu.r[rd] = result; cpu.r[rd] = result;
cpu.cpsr.n.write(result >> 31 & 1 == 1); cpu.cpsr.n.write(result >> 31 & 1 == 1);
cpu.cpsr.z.write(result == 0); cpu.cpsr.z.write(result == 0);
cpu.cpsr.c.write(overflow); cpu.cpsr.c.write(overflow == 0b1);
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1); cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
} }
} }
@ -145,7 +145,7 @@ pub fn fmt3(comptime op: u2, comptime rd: u3) InstrFn {
const op1 = cpu.r[rd]; const op1 = cpu.r[rd];
const op2: u32 = opcode & 0xFF; // Offset const op2: u32 = opcode & 0xFF; // Offset
var overflow: bool = undefined; var overflow: u1 = undefined;
const result: u32 = switch (op) { const result: u32 = switch (op) {
0b00 => op2, // MOV 0b00 => op2, // MOV
0b01 => op1 -% op2, // CMP 0b01 => op1 -% op2, // CMP
@ -169,7 +169,7 @@ pub fn fmt3(comptime op: u2, comptime rd: u3) InstrFn {
}, },
0b10 => { 0b10 => {
// ADD // ADD
cpu.cpsr.c.write(overflow); cpu.cpsr.c.write(overflow == 0b1);
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1); cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
}, },
} }