2022-10-21 08:11:49 +00:00
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const std = @import("std");
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2022-10-21 08:11:56 +00:00
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const CPSR = @import("../../cpu.zig").PSR;
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2022-10-21 08:11:49 +00:00
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2022-10-21 08:11:52 +00:00
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pub fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
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2022-10-21 08:11:49 +00:00
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var shift_amt: u8 = undefined;
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if (opcode >> 4 & 1 == 1) {
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shift_amt = @truncate(u8, cpu.r[opcode >> 8 & 0xF]);
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} else {
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shift_amt = @truncate(u8, opcode >> 7 & 0x1F);
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}
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const rm = cpu.r[opcode & 0xF];
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2022-10-21 08:11:55 +00:00
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var value: u32 = undefined;
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if (rm == 0xF) {
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value = cpu.fakePC() + 4; // 12 ahead
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} else {
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value = cpu.r[opcode & 0xF];
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}
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2022-10-21 08:11:49 +00:00
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2022-10-21 08:11:58 +00:00
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return switch (@truncate(u2, opcode >> 5)) {
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0b00 => logicalLeft(S, &cpu.cpsr, value, shift_amt),
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0b01 => logicalRight(S, &cpu.cpsr, value, shift_amt),
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0b10 => arithmeticRight(S, &cpu.cpsr, value, shift_amt),
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0b11 => rotateRight(S, &cpu.cpsr, value, shift_amt),
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};
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2022-10-21 08:11:49 +00:00
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}
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2022-10-21 08:11:58 +00:00
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pub fn logicalLeft(comptime S: bool, cpsr: *CPSR, rm: u32, amount: u8) u32 {
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const shift_amt = @truncate(u5, amount);
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2022-10-21 08:11:49 +00:00
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const bit_count: u8 = @typeInfo(u32).Int.bits;
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var result: u32 = 0x0000_0000;
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2022-10-21 08:11:58 +00:00
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if (amount < bit_count) {
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2022-10-21 08:11:49 +00:00
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// We can perform a well-defined shift here
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// FIXME: We assume cpu.r[rs] == 0 and imm_shift == 0 are equivalent
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2022-10-21 08:11:58 +00:00
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if (S and shift_amt != 0) {
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2022-10-21 08:11:49 +00:00
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const carry_bit = @truncate(u5, bit_count - shift_amt);
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cpsr.c.write(rm >> carry_bit & 1 == 1);
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}
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result = rm << shift_amt;
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2022-10-21 08:11:58 +00:00
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} else if (amount == bit_count) {
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2022-10-21 08:11:49 +00:00
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// Shifted all bits out, carry bit is bit 0 of rm
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2022-10-21 08:11:58 +00:00
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if (S) cpsr.c.write(rm & 1 == 1);
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2022-10-21 08:11:49 +00:00
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} else {
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// Shifted all bits out, carry bit has also been shifted out
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2022-10-21 08:11:58 +00:00
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if (S) cpsr.c.write(false);
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2022-10-21 08:11:49 +00:00
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}
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return result;
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}
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2022-10-21 08:11:58 +00:00
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pub fn logicalRight(comptime S: bool, cpsr: *CPSR, rm: u32, amount: u32) u32 {
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const shift_amt = @truncate(u5, amount);
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2022-10-21 08:11:49 +00:00
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const bit_count: u8 = @typeInfo(u32).Int.bits;
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var result: u32 = 0x0000_0000;
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2022-10-21 08:11:58 +00:00
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if (amount == 0 or amount == bit_count) {
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2022-10-21 08:11:49 +00:00
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// Actualy LSR #32
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2022-10-21 08:11:58 +00:00
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if (S) cpsr.c.write(rm >> 31 & 1 == 1);
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} else if (amount < bit_count) {
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2022-10-21 08:11:49 +00:00
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// We can perform a well-defined shift
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const carry_bit = shift_amt - 1;
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2022-10-21 08:11:58 +00:00
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if (S) cpsr.c.write(rm >> carry_bit & 1 == 1);
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2022-10-21 08:11:49 +00:00
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result = rm >> shift_amt;
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} else {
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// All bits have been shifted out, including carry bit
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2022-10-21 08:11:58 +00:00
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if (S) cpsr.c.write(false);
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2022-10-21 08:11:49 +00:00
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}
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return result;
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}
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2022-10-21 08:11:58 +00:00
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pub fn arithmeticRight(comptime _: bool, _: *CPSR, _: u32, _: u8) u32 {
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2022-10-21 08:11:49 +00:00
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// @bitCast(u32, @bitCast(i32, r_val) >> @truncate(u5, amount))
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std.debug.panic("[BarrelShifter] implement arithmetic shift right", .{});
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}
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2022-10-21 08:11:58 +00:00
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pub fn rotateRight(comptime S: bool, cpsr: *CPSR, rm: u32, amount: u8) u32 {
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const result = std.math.rotr(u32, rm, amount);
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2022-10-21 08:11:58 +00:00
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2022-10-21 08:11:58 +00:00
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if (S and result != 0) {
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2022-10-21 08:11:58 +00:00
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cpsr.c.write(result >> 31 & 1 == 1);
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}
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return result;
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2022-10-21 08:11:49 +00:00
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}
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