zba/src/Bus.zig

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const std = @import("std");
const Bios = @import("bus/Bios.zig");
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const Ewram = @import("bus/Ewram.zig");
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const GamePak = @import("bus/GamePak.zig");
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const Io = @import("bus/io.zig").Io;
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const Iwram = @import("bus/Iwram.zig");
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const Ppu = @import("ppu.zig").Ppu;
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const Apu = @import("apu.zig").Apu;
const DmaControllers = @import("bus/dma.zig").DmaControllers;
const Timers = @import("bus/timer.zig").Timers;
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const Scheduler = @import("scheduler.zig").Scheduler;
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const io = @import("bus/io.zig");
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const Allocator = std.mem.Allocator;
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const log = std.log.scoped(.Bus);
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const Self = @This();
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const panic_on_und_bus: bool = false;
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pak: GamePak,
bios: Bios,
ppu: Ppu,
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apu: Apu,
dma: DmaControllers,
tim: Timers,
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iwram: Iwram,
ewram: Ewram,
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io: Io,
pub fn init(alloc: Allocator, sched: *Scheduler, rom_path: []const u8, bios_path: ?[]const u8, save_path: ?[]const u8) !Self {
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return Self{
.pak = try GamePak.init(alloc, rom_path, save_path),
.bios = try Bios.init(alloc, bios_path),
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.ppu = try Ppu.init(alloc, sched),
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.apu = Apu.init(),
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.iwram = try Iwram.init(alloc),
.ewram = try Ewram.init(alloc),
.dma = DmaControllers.init(),
.tim = Timers.init(sched),
.io = Io.init(),
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};
}
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pub fn deinit(self: Self) void {
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self.iwram.deinit();
self.ewram.deinit();
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self.pak.deinit();
self.bios.deinit();
self.ppu.deinit();
}
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pub fn read32(self: *const Self, addr: u32) u32 {
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return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.read(u32, addr),
0x0200_0000...0x02FF_FFFF => self.ewram.read(u32, addr),
0x0300_0000...0x03FF_FFFF => self.iwram.read(u32, addr),
0x0400_0000...0x0400_03FE => io.read32(self, addr),
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// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u32, addr),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u32, addr),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u32, addr),
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// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.read(u32, addr),
0x0A00_0000...0x0BFF_FFFF => self.pak.read(u32, addr),
0x0C00_0000...0x0DFF_FFFF => self.pak.read(u32, addr),
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else => undRead("Tried to read from 0x{X:0>8}", .{addr}),
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};
}
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pub fn write32(self: *Self, addr: u32, word: u32) void {
// TODO: write32 can write to GamePak Flash
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switch (addr) {
// General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.write(u32, addr, word),
0x0300_0000...0x03FF_FFFF => self.iwram.write(u32, addr, word),
0x0400_0000...0x0400_03FE => io.write32(self, addr, word),
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// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u32, addr, word),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u32, addr, word),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u32, addr, word),
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else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, addr }),
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}
}
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pub fn read16(self: *const Self, addr: u32) u16 {
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return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.read(u16, addr),
0x0200_0000...0x02FF_FFFF => self.ewram.read(u16, addr),
0x0300_0000...0x03FF_FFFF => self.iwram.read(u16, addr),
0x0400_0000...0x0400_03FE => io.read16(self, addr),
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// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u16, addr),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u16, addr),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u16, addr),
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// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.read(u16, addr),
0x0A00_0000...0x0BFF_FFFF => self.pak.read(u16, addr),
0x0C00_0000...0x0DFF_FFFF => self.pak.read(u16, addr),
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else => undRead("Tried to read from 0x{X:0>8}", .{addr}),
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};
}
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pub fn write16(self: *Self, addr: u32, halfword: u16) void {
// TODO: write16 can write to GamePak Flash
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switch (addr) {
// General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.write(u16, addr, halfword),
0x0300_0000...0x03FF_FFFF => self.iwram.write(u16, addr, halfword),
0x0400_0000...0x0400_03FE => io.write16(self, addr, halfword),
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// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u16, addr, halfword),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u16, addr, halfword),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u16, addr, halfword),
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0x0800_00C4, 0x0800_00C6, 0x0800_00C8 => log.warn("Tried to write 0x{X:0>4} to GPIO", .{halfword}),
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else => undWrite("Tried to write 0x{X:0>4} to 0x{X:0>8}", .{ halfword, addr }),
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}
}
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pub fn read8(self: *const Self, addr: u32) u8 {
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return switch (addr) {
// General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.read(u8, addr),
0x0200_0000...0x02FF_FFFF => self.ewram.read(u8, addr),
0x0300_0000...0x03FF_FFFF => self.iwram.read(u8, addr),
0x0400_0000...0x0400_03FE => io.read8(self, addr),
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// Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u8, addr),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u8, addr),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u8, addr),
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// External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.read(u8, addr),
0x0A00_0000...0x0BFF_FFFF => self.pak.read(u8, addr),
0x0C00_0000...0x0DFF_FFFF => self.pak.read(u8, addr),
0x0E00_0000...0x0E00_FFFF => self.pak.backup.read(addr),
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else => undRead("Tried to read from 0x{X:0>2}", .{addr}),
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};
}
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pub fn write8(self: *Self, addr: u32, byte: u8) void {
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switch (addr) {
// General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.write(u8, addr, byte),
0x0300_0000...0x03FF_FFFF => self.iwram.write(u8, addr, byte),
0x0400_0000...0x0400_03FE => io.write8(self, addr, byte),
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0x0400_0410 => log.info("Ignored write of 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }),
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// External Memory (Game Pak)
0x0E00_0000...0x0E00_FFFF => self.pak.backup.write(addr, byte),
else => undWrite("Tried to write 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }),
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}
}
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fn undRead(comptime format: []const u8, args: anytype) u8 {
if (panic_on_und_bus) std.debug.panic(format, args) else log.warn(format, args);
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return 0;
}
fn undWrite(comptime format: []const u8, args: anytype) void {
if (panic_on_und_bus) std.debug.panic(format, args) else log.warn(format, args);
}