Rekai Nyangadzayi Musuka
9d2fbd2427
chore: remove unecessary print statements
2021-04-05 01:20:03 -05:00
Rekai Nyangadzayi Musuka
748c32c446
fix(cpu): use enums only of maintaining IME register state
2021-04-05 01:10:03 -05:00
Rekai Nyangadzayi Musuka
77c7c610d0
chore(cpu): rename ImeSet to ImeEnabled
2021-04-05 00:53:46 -05:00
Rekai Nyangadzayi Musuka
a15a6a25b6
feat(cpu): properly implement EI instruction
2021-04-05 00:52:12 -05:00
Rekai Nyangadzayi Musuka
62bd88945f
chore: rename a couple of interrupt instances to "int" instead of
...
"interrupt"
2021-04-04 01:52:53 -05:00
Rekai Nyangadzayi Musuka
7c9bff61f6
fix(ppu): add missing check for enabled interrupt
2021-04-04 01:50:49 -05:00
Rekai Nyangadzayi Musuka
777abd1c10
chore: rename some symbols
2021-04-04 01:31:31 -05:00
Rekai Nyangadzayi Musuka
4dd7a0d9ce
chore: fix several clippy warnings
2021-04-04 01:19:39 -05:00
Rekai Nyangadzayi Musuka
cb1bcdb859
feat(cpu): implement DAA instruction
2021-04-04 01:03:44 -05:00
Rekai Nyangadzayi Musuka
25e44f3e49
chore: fix condition when logs are printed
2021-03-27 15:07:17 -05:00
Rekai Nyangadzayi Musuka
2b05571c49
chore: rename Cycles newtype to Cycle
2021-03-27 12:10:18 -05:00
Rekai Nyangadzayi Musuka
bce14348f8
feat: enable halt and rework timer registers
2021-03-27 11:56:47 -05:00
Rekai Nyangadzayi Musuka
2bf877d1ec
fix(cpu): Ensure mask the high bits of the flag register
...
There was a bug where POP AF returned 0x1301. In this example, the A
register would be set to 0x13, and the Flag register woud be set to
0x01, which is an invalid state considering only bits 4 -> 7 of the flag
register are used. This commit masks the flag register with & 0xF0
whenever it is read or written to so that we can ensure that only the
high bits can ever be potentially set
2021-03-26 20:25:30 -05:00
Rekai Nyangadzayi Musuka
15781b3d5a
fix(instructions): correct the flags being set in ADD HL, r16
2021-03-26 20:19:48 -05:00
Rekai Nyangadzayi Musuka
a6d5553035
fix(cartridge): reimplement apply_rom_size_bitmask
2021-03-26 20:18:49 -05:00
Rekai Nyangadzayi Musuka
a82e3d3372
feat: implement HALT behaviour
...
note: while the logic is there, the instruction currently does not do
anything because we don't halde it in Cpu::step(). The code that does is
currently commented out and there should be some underlying bugs still
present. Nevertheless it is a good start
2021-03-23 23:05:27 -05:00
Rekai Nyangadzayi Musuka
c16f318fd1
fix: remove unnecessary allocation when loading boot rom
2021-03-23 21:21:18 -05:00
Rekai Nyangadzayi Musuka
48ac8317a8
fix(bus): fix off by one error when reading from boot rom
2021-03-23 21:01:33 -05:00
Rekai Nyangadzayi Musuka
e5fb07c4d1
chore: refactor parts of instruction.rs
2021-03-23 20:22:11 -05:00
Rekai Nyangadzayi Musuka
501d93c37b
chore: clean up code in one instruction
2021-03-23 18:21:59 -05:00
Rekai Nyangadzayi Musuka
1b7d778c1d
chore: clean up some instruction code
2021-03-23 02:11:40 -05:00
Rekai Nyangadzayi Musuka
6f11640f24
chore: replace CALL instruction with RST in interrupt handler
2021-03-23 02:11:06 -05:00
Rekai Nyangadzayi Musuka
342e6616ac
chore: improve unreachable! and panic! error messages
2021-03-22 22:33:56 -05:00
Rekai Nyangadzayi Musuka
2813b762dd
chore: replace select unreachable! macros with todo! and unreachable!
2021-03-22 21:52:28 -05:00
Rekai Nyangadzayi Musuka
9301a36682
chore: remove all unwraps from the project
2021-03-22 21:48:12 -05:00
Rekai Nyangadzayi Musuka
45466a5733
feat: implement clap for cli and improve error messages
2021-03-22 21:41:22 -05:00
Rekai Nyangadzayi Musuka
d7d9fd857f
fix: squash bugs in cpu intrucion implementation
2021-03-21 21:16:23 -05:00
Rekai Nyangadzayi Musuka
8a1540c9e9
fix: replaced unnecessary &mut self with &self
2021-03-21 19:56:38 -05:00
Rekai Nyangadzayi Musuka
dc45688e4f
feat: implement timers
2021-03-21 03:03:03 -05:00
Rekai Nyangadzayi Musuka
4db6f1de6e
chore: move LR35902_CLOCK_SPEED to lib.rs
2021-03-21 02:10:56 -05:00
Rekai Nyangadzayi Musuka
b548610fdb
chore: re-enable scrolling
2021-03-21 02:08:29 -05:00
Rekai Nyangadzayi Musuka
fe586d77ac
feat: stub 0xFF05
2021-03-21 02:01:19 -05:00
Rekai Nyangadzayi Musuka
15da6cb7d2
fix: squash several bugs in MBC1 implementation
2021-03-21 01:52:29 -05:00
Rekai Nyangadzayi Musuka
5a42d76f1e
feat: implement LCDSTAT interrupt
2021-03-21 00:01:21 -05:00
Rekai Nyangadzayi Musuka
c64417fdce
fix: horizontally flip ppu so the Nin***** logo is readable
2021-03-20 23:24:06 -05:00
Rekai Nyangadzayi Musuka
7462061937
chore: be more specific with integer types
2021-03-20 22:19:55 -05:00
Rekai Nyangadzayi Musuka
f78651d8d7
feat: implement programmable background palette
2021-03-20 22:19:13 -05:00
Rekai Nyangadzayi Musuka
b213a6e545
feat: make 0xFF0F aware of joypad struct interrupt bool
2021-03-20 21:21:55 -05:00
Rekai Nyangadzayi Musuka
36e572b783
feat: implement Joypad register
2021-03-20 21:11:45 -05:00
Rekai Nyangadzayi Musuka
fc303b6265
chore: rename "as u8" to "as Self" when implementing From Trait
2021-03-20 21:10:48 -05:00
Rekai Nyangadzayi Musuka
cd0eac9d37
chore: improve code quality
...
Removed a lot of magic constants. Gave them descriptive variable names
2021-03-20 20:26:49 -05:00
Rekai Nyangadzayi Musuka
0f4dec8a38
feat: implement cpu timing for emulator
...
When running the GB Boot ROM, a garbled Nin***** logo will appear
2021-03-20 19:56:26 -05:00
Rekai Nyangadzayi Musuka
d76b3b6101
chore: make Cycles::new a const fn
2021-03-20 19:55:39 -05:00
Rekai Nyangadzayi Musuka
2401cf7190
chore: implement default for cycles
2021-03-20 19:55:02 -05:00
Rekai Nyangadzayi Musuka
f365633c1e
fix: allow for the ppu to modify interrupt flags
2021-03-20 19:53:56 -05:00
Rekai Nyangadzayi Musuka
558f9e7c72
feat: implement cpu interrupts
2021-03-18 21:07:19 -05:00
Rekai Nyangadzayi Musuka
fb38ef3f68
feat: emu slowly draws scanline to pixelbuffer
2021-03-18 21:06:57 -05:00
Rekai Nyangadzayi Musuka
4663e8c960
chore: unifty read_byte and write_byte across hardware
2021-03-17 00:29:36 -05:00
Rekai Nyangadzayi Musuka
adeb6ca8a9
feat: implement window x, window y and ly compare registers
2021-03-16 22:52:43 -05:00
Rekai Nyangadzayi Musuka
06821bf880
fix: improve types of heap allocated arrays
2021-03-16 22:51:41 -05:00
Rekai Nyangadzayi Musuka
528b88eeb7
feat: implement Obj Palette 0 and 1
2021-03-16 02:36:09 -05:00
Rekai Nyangadzayi Musuka
8af434da07
fix: have the PPU use the CPU-writable Display Mode enum
2021-03-16 02:35:01 -05:00
Rekai Nyangadzayi Musuka
8c25e6f976
chore: fix spelling mistake
2021-03-16 02:31:07 -05:00
Rekai Nyangadzayi Musuka
19f642eafe
chore: make clippy happy
2021-03-16 01:05:13 -05:00
Rekai Nyangadzayi Musuka
bfde24cc8d
fix: reimplement some ppu structs as bitfield macros
2021-03-16 00:27:27 -05:00
Rekai Nyangadzayi Musuka
ef4cc8c3b6
chore: standardize the error message of a subet of unreachable! calls
2021-03-15 23:53:55 -05:00
Rekai Nyangadzayi Musuka
3b5d94adfc
fix: reimplement flags register to be a bitfield
2021-03-15 23:35:20 -05:00
Rekai Nyangadzayi Musuka
f57cf2b312
fix: switch to bitfield macros in serial.rs
2021-03-15 22:52:26 -05:00
Rekai Nyangadzayi Musuka
d0410c4dfd
fix: modify access parameters in timer.rs
2021-03-15 22:51:12 -05:00
Rekai Nyangadzayi Musuka
f17bb032cc
fix: implement bitfield macros in timer.rs
2021-03-15 22:41:41 -05:00
Rekai Nyangadzayi Musuka
1a8506c04f
chore: improve code quality
2021-03-15 22:36:27 -05:00
Rekai Nyangadzayi Musuka
3d82465b04
chore: clean up code
2021-03-15 22:08:47 -05:00
Rekai Nyangadzayi Musuka
84babc4d69
fix: convert structs to bitfield structs in interrupt.rs
2021-03-15 21:59:53 -05:00
Rekai Nyangadzayi Musuka
602a0af4b7
chore: update parameter names in sound.rs
2021-03-15 21:43:50 -05:00
Rekai Nyangadzayi Musuka
f929cd5989
chore: update access modifiers in sound.rs
2021-03-15 21:36:57 -05:00
Rekai Nyangadzayi Musuka
8989d3f1d7
fix: convert sound.rs structs to bitfields
2021-03-15 21:16:11 -05:00
Rekai Nyangadzayi Musuka
98e67b8c1c
chore: fix spelling error
2021-03-15 19:20:08 -05:00
Rekai Nyangadzayi Musuka
d30ce4dbb2
chore: improve code quailty
2021-03-15 19:19:40 -05:00
Rekai Nyangadzayi Musuka
5d95eadd2e
fix: implement Default and Clone for Box<dyn MBC>
2021-03-15 19:08:19 -05:00
Rekai Nyangadzayi Musuka
d78a50fefc
chore: fix tests and simplify CI build
2021-01-27 22:17:01 -06:00
Rekai Nyangadzayi Musuka
b053260c8b
feat: don't embed gb boot rom in emulator
2021-01-27 22:07:31 -06:00
Rekai Nyangadzayi Musuka
b5d3a2c675
feat: implement MBC1
2021-01-20 01:39:24 -06:00
Rekai Nyangadzayi Musuka
96bfc43312
chore: fix spelling errors
2021-01-19 22:44:48 -06:00
Rekai Nyangadzayi Musuka
842e670807
fix: replace MathTarget::HL and ::SP with already-existing enums
2021-01-19 02:05:04 -06:00
Rekai Nyangadzayi Musuka
b70c398e14
feat: implement registers 0xFF01 and 0xFF02
2021-01-19 01:40:07 -06:00
Rekai Nyangadzayi Musuka
68c9557c43
chore: improve code quality
2021-01-19 01:36:44 -06:00
Rekai Nyangadzayi Musuka
1da01a318d
feat: emulator now sucessfully runs boot rom
2021-01-19 00:30:32 -06:00
Rekai Nyangadzayi Musuka
9143286e9c
feat: implement more operator overrides for Cycles
2021-01-19 00:29:04 -06:00
Rekai Nyangadzayi Musuka
9b4c95ce4c
feat: reimplement cycles newtype
2021-01-18 22:54:38 -06:00
Rekai Nyangadzayi Musuka
2fc7ac3833
feat: add pixels-rs and winit as dependencies
2021-01-18 20:47:09 -06:00
Rekai Nyangadzayi Musuka
207bcfea30
chore: improve debug logs
2021-01-18 02:47:41 -06:00
Rekai Nyangadzayi Musuka
49a45d48cb
fix: improve appearance of debug logs
2021-01-18 02:29:35 -06:00
Rekai Nyangadzayi Musuka
9203b61533
fix: implement 0xff41 and fix CALL instruciton
2021-01-18 02:22:45 -06:00
Rekai Nyangadzayi Musuka
386a780a6f
fix: call opcode now pushes correct address onto stack
2021-01-17 22:12:00 -06:00
Rekai Nyangadzayi Musuka
c0b8b8bda2
feat: implement more registers
2021-01-17 21:13:59 -06:00
Rekai Nyangadzayi Musuka
70de3b9142
feat: stub 0xff40 and 0xff47
2021-01-17 19:25:53 -06:00
Rekai Nyangadzayi Musuka
92218a227d
feat: implement 0xff24 sound register
2021-01-17 18:58:57 -06:00
Rekai Nyangadzayi Musuka
251f4e8d6d
feat: implement several sound i/o registers
2021-01-17 17:33:12 -06:00
Rekai Nyangadzayi Musuka
072c5f1b70
fix: squash bug in 64 LD instructions
2021-01-17 17:31:45 -06:00
Rekai Nyangadzayi Musuka
834423fe18
feat: stub sound register 0xff26
2021-01-03 02:05:46 -06:00
Rekai Nyangadzayi Musuka
1b53363095
feat: stub 0xff0f and 0xffff from interrupt
2021-01-03 01:38:31 -06:00
Rekai Nyangadzayi Musuka
e693ad8a3c
feat: create timer struct and stub 0xff07
2021-01-03 01:21:19 -06:00
Rekai Nyangadzayi Musuka
911f0f9c86
feat: stub work ram
2021-01-03 00:28:07 -06:00
Rekai Nyangadzayi Musuka
8048495cbc
chore: move ppu vram from stack to heap
2021-01-02 23:58:49 -06:00
Rekai Nyangadzayi Musuka
fb0772c671
chore: remove duplicate code
2021-01-02 22:49:25 -06:00
Rekai Nyangadzayi Musuka
fe74f80ddf
chore: format code
2020-12-24 00:34:48 -06:00
Rekai Nyangadzayi Musuka
26df683cff
chore: move vram buffer to PPU struct
2020-12-24 00:27:06 -06:00
Rekai Nyangadzayi Musuka
677a584ba7
chore: stub vram, start work on ppu, fix set_register bug
2020-12-23 21:24:58 -06:00
Rekai Nyangadzayi Musuka
2a234f4d14
feat: implement ability to boot straigt to cartridge
2020-12-23 19:39:37 -06:00
Rekai Nyangadzayi Musuka
1502cc3ec2
chore: add debug information to bus.rs
2020-12-23 03:43:49 -06:00
Rekai Nyangadzayi Musuka
4d2e0e33f2
feat: implement fetch, decode, execute loop
2020-12-23 03:25:16 -06:00
Rekai Nyangadzayi Musuka
e540c86c7e
chore: make InstrRegisterPair public
2020-12-23 01:58:55 -06:00
Rekai Nyangadzayi Musuka
bf945c3f44
chore: make InstrRegister public to satisfy rust
2020-12-23 01:27:11 -06:00
Rekai Nyangadzayi Musuka
db86d11085
chore: refactor LDTarget and InstrRegister
2020-12-23 01:24:06 -06:00
Rekai Nyangadzayi Musuka
2e1c97e5d7
chore: reorganize instructions.rs
2020-12-23 01:17:13 -06:00
Rekai Nyangadzayi Musuka
9cd4c4ea11
chore: remove duplicate Instruction::INC match
2020-12-23 01:11:03 -06:00
Rekai Nyangadzayi Musuka
5187cbed76
feat: implement remaining gb opcodes
...
As of now, the initial implementation of all GameBoy opcoes are
complete. There's most likely a lot of bugs in them, however the
foundtain has been placed.
2020-12-23 01:07:30 -06:00
Rekai Nyangadzayi Musuka
9be1d1508e
feat: implement all opcodes in rot table
2020-12-23 00:24:29 -06:00
Rekai Nyangadzayi Musuka
f9d7fe05df
Merge branch 'master' of ssh://ssh.paoda.moe:31059/paoda/gb
2020-12-22 22:23:28 -06:00
Rekai Nyangadzayi Musuka
4bf9ccb98c
chore: qol update
2020-12-22 22:23:09 -06:00
Rekai Nyangadzayi Musuka
c876778da8
chore: replace 16-bit half carry implementation
2020-11-28 15:42:50 -06:00
Rekai Nyangadzayi Musuka
7edffb166d
chore: Implement exec of RLC and RRC
2020-09-07 22:34:09 -05:00
Rekai Nyangadzayi Musuka
a4b3da1939
chore: replace unimplemented!() with unreachable!()
2020-09-07 21:51:20 -05:00
Rekai Nyangadzayi Musuka
cd6f242f56
feat: Implement exec of all unprefixed opcodes
2020-09-07 21:49:10 -05:00
Rekai Nyangadzayi Musuka
eb90ac31e2
chore: Document prefixed opcode decoding
2020-09-07 21:22:26 -05:00
Rekai Nyangadzayi Musuka
7538f946d4
feat: Implement prefixed opcode decoding
2020-09-07 21:18:53 -05:00
Rekai Nyangadzayi Musuka
a9510bed54
chore: Document instruction execution implementations
2020-09-07 20:57:31 -05:00
Rekai Nyangadzayi Musuka
f193132c5e
chore: Implement imm byte versions of alu opcodes
2020-09-07 20:50:33 -05:00
Rekai Nyangadzayi Musuka
70a959fa32
chore: Remove LHS MathTarget from ADC and SBC
2020-09-07 20:28:24 -05:00
Rekai Nyangadzayi Musuka
e31d83deae
chore: Implement DI, EI, CALL & PUSH instructions
2020-09-07 20:19:10 -05:00
Rekai Nyangadzayi Musuka
0e3bdb8a2a
chore: convert TryFrom error types to &'static str
...
Prevents an unnecessary heap allocation when a RegisterPair::try_from() or
Register::try_from() fails.
2020-09-04 14:43:19 -05:00
Rekai Nyangadzayi Musuka
213c5e5cb3
Implement more instructions
2020-09-04 00:41:19 -05:00
Rekai Nyangadzayi Musuka
11d2d26cdc
Implement more instrucitons
2020-09-02 21:54:58 -05:00
Rekai Nyangadzayi Musuka
49dac85470
Utilize pattern matching more
2020-09-02 19:35:48 -05:00
Rekai Nyangadzayi Musuka
cb365fd932
Implement Instructions and rename enums
2020-09-02 17:26:46 -05:00
Rekai Nyangadzayi Musuka
0be0030ed7
Implement CPU Instructions
2020-09-01 00:16:05 -05:00
Rekai Nyangadzayi Musuka
21b7f82422
Decode all unprefixed opcodes
2020-08-29 23:07:53 -05:00
Rekai Nyangadzayi Musuka
e0235094bb
Implement basic layout of Gameboy Emulator
2020-08-29 18:38:27 -05:00
Rekai Nyangadzayi Musuka
0401bb7e49
Restart Project
2020-08-25 12:10:38 -05:00
Rekai Nyangadzayi Musuka
4bc18f4dd9
Resolve build error
2020-08-24 00:54:36 -05:00
Rekai Nyangadzayi Musuka
b1bbd67832
Implement 2 opcodes
2020-08-24 00:53:47 -05:00
Rekai Nyangadzayi Musuka
deec130381
Implement decode for all x=2 unprefixed opcodes
2020-08-24 00:42:16 -05:00
Rekai Nyangadzayi Musuka
378a559106
Implement decode for all x=1 unprefixed opcodes.
2020-08-24 00:11:54 -05:00
Rekai Nyangadzayi Musuka
146e2dc066
Implement decode for all x=0 unprefixed opcodes.
2020-08-23 23:56:20 -05:00
f97bf9dbb7
Stub Bus, and CPU, implement some opcode decoding.
2020-08-06 01:05:16 -05:00
b274d61f56
Restart Project
2020-08-05 21:54:30 -05:00
a3cd9166ab
Implement Register methods, and stub ADD opcodes
2020-08-05 03:23:50 -05:00
8b475cb4cf
Restart GB Emulator
2020-08-04 17:58:48 -05:00
9032716346
Stub 8-bit ALU and 16-bit Arithmetic opcodes.
2020-08-01 16:31:24 -05:00
8a822437fb
Rename struct Instruction's methods
2020-07-30 22:41:30 -05:00
26ddb1f9f0
Write stubs for some 16-bit LD instructions
2020-07-29 14:41:56 -05:00
0f85e6702b
Stub 8-bit LD Instructions
2020-07-28 23:58:50 -05:00
167c267e36
Reimplement Flag Register struct
2020-07-22 01:41:12 -05:00
05cff7a27f
Implement LR35902 Registers
2020-07-22 00:19:27 -05:00
Rekai Musuka