chore(bus): implement read/write blocks when dma is active

This commit is contained in:
Rekai Nyangadzayi Musuka 2021-06-05 20:53:35 -05:00
parent 2e42513d71
commit b7b213b6b9
4 changed files with 28 additions and 21 deletions

View File

@ -3,7 +3,7 @@ use super::high_ram::HighRam;
use super::instruction::Cycle;
use super::interrupt::{Interrupt, InterruptFlag};
use super::joypad::Joypad;
use super::ppu::Ppu;
use super::ppu::{Ppu, PpuMode};
use super::serial::Serial;
use super::sound::Sound;
use super::timer::Timer;
@ -133,9 +133,13 @@ impl Bus {
_ => unreachable!("{:#06X} was incorrectly handled by ECHO RAM", addr),
}
}
0xFE00..=0xFE9F if self.ppu.dma.is_active() => 0xFF,
0xFE00..=0xFE9F => {
// Sprite Attribute Table
self.ppu.oam.read_byte(addr)
match self.ppu.stat.mode() {
PpuMode::HBlank | PpuMode::VBlank => self.ppu.oam.read_byte(addr),
PpuMode::OamScan | PpuMode::Drawing => 0xFF,
}
}
0xFEA0..=0xFEFF => {
// eprintln!("Read from {:#06X}, which is prohibited", addr);
@ -240,9 +244,14 @@ impl Bus {
_ => unreachable!("{:#06X} was incorrectly handled by ECHO RAM", addr),
}
}
0xFE00..=0xFE9F if self.ppu.dma.is_active() => {}
0xFE00..=0xFE9F => {
// Sprite Attribute Table
self.ppu.oam.write_byte(addr, byte);
match self.ppu.stat.mode() {
PpuMode::HBlank | PpuMode::VBlank => self.ppu.oam.write_byte(addr, byte),
PpuMode::Drawing | PpuMode::OamScan => {}
}
}
0xFEA0..=0xFEFF => {
// eprintln!("Wrote {:#04X} to {:#06X}, which is prohibited", byte, addr);

View File

@ -96,6 +96,8 @@ impl Cpu {
// self.log_state(handle).unwrap();
// }
self.handle_interrupts();
let cycles = match self.halted() {
Some(state) => {
use HaltState::*;
@ -119,7 +121,7 @@ impl Cpu {
};
self.bus.step(cycles);
self.handle_interrupts();
self.bus.step_dma(cycles);
cycles
}

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@ -4,10 +4,10 @@ use crate::GB_WIDTH;
use dma::DmaProcess;
use std::collections::VecDeque;
use std::convert::TryInto;
use self::types::{
pub use types::PpuMode;
use types::{
BackgroundPalette, GrayShade, LCDControl, LCDStatus, ObjectFlags, ObjectPalette,
ObjectPaletteId, ObjectSize, Pixels, PpuMode, RenderPriority, TileDataAddress,
ObjectPaletteId, ObjectSize, Pixels, RenderPriority, TileDataAddress,
};
pub(crate) mod dma;
@ -188,7 +188,7 @@ impl Ppu {
}
fn scan_oam(&mut self) {
if self.scan_state.mode() == OamScanMode::Scan {
if self.scan_state.mode() == OamScanMode::Scan && self.dma.is_active() {
if !self.window_stat.coincidence() && self.scan_state.count() == 0 {
// Determine whether we should draw the window next frame
self.window_stat

View File

@ -45,6 +45,10 @@ impl DmaProcess {
}
}
pub(crate) fn is_active(&self) -> bool {
self.state == DmaState::Transferring
}
fn reset(&mut self) {
self.cycle = Cycle::new(0);
self.state = DmaState::Disabled;
@ -84,14 +88,6 @@ impl Default for DmaControl {
}
impl DmaControl {
fn src(&self) -> Option<&Range<u16>> {
self.src.as_ref()
}
fn dest(&self) -> &Range<u16> {
&self.dest
}
pub fn update(&mut self, byte: u8, state: &mut DmaState) {
let left = (byte as u16) << 8 | 0x0000;
let right = (byte as u16) << 8 | 0x009F;
@ -116,12 +112,12 @@ mod tests {
let mut dma_ctrl: DmaControl = Default::default();
let mut state = DmaState::Disabled;
assert_eq!(dma_ctrl.src(), None);
assert_eq!(*dma_ctrl.dest(), 0xFE00..0xFE9F);
assert_eq!(dma_ctrl.src, None);
assert_eq!(dma_ctrl.dest, 0xFE00..0xFE9F);
dma_ctrl.update(0xAB, &mut state);
assert_eq!(dma_ctrl.src(), Some(0xAB00..0xAB9F).as_ref());
assert_eq!(*dma_ctrl.dest(), 0xFE00..0xFE9F);
assert_eq!(dma_ctrl.src, Some(0xAB00..0xAB9F));
assert_eq!(dma_ctrl.dest, 0xFE00..0xFE9F);
}
#[test]
@ -131,7 +127,7 @@ mod tests {
bus.dma.ctrl.update(0xAB, &mut bus.dma.state);
assert_eq!(bus.dma.ctrl.src(), Some(0xAB00..0xAB9F).as_ref());
assert_eq!(bus.dma.ctrl.src, Some(0xAB00..0xAB9F));
assert_eq!(bus.dma.state, DmaState::Pending);
}
}