fix: pass more test roms

src/core/nds9/Bus.zig

@@ -77,12 +77,12 @@ fn _read(self: *@This(), comptime T: type, comptime mode: Mode, address: u32) T
     }
 
     return switch (aligned_addr) {
-        0x0200_0000...0x02FF_FFFF => readInt(T, self.main[aligned_addr & 0x003F_FFFF ..][0..byte_count]),
+        0x0200_0000...0x02FF_FFFF => readInt(T, self.main[aligned_addr & (4 * MiB - 1) ..][0..byte_count]),
         0x0300_0000...0x03FF_FFFF => self.wram.read(T, .nds9, aligned_addr),
         0x0400_0000...0x04FF_FFFF => io.read(self, T, aligned_addr),
         0x0500_0000...0x05FF_FFFF => readInt(T, self.makeshift_palram[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)]),
         0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(T, .nds9, aligned_addr),
-        0x0700_0000...0x07FF_FFFF => readInt(T, self.ppu.oam.buf[aligned_addr..][0..byte_count]),
+        0x0700_0000...0x07FF_FFFF => readInt(T, self.ppu.oam.buf[aligned_addr & (2 * KiB - 1) ..][0..byte_count]),
         0xFFFF_0000...0xFFFF_FFFF => self.bios.read(T, address),
         else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
     };

src/core/nds9/dma.zig

@@ -219,7 +219,7 @@ fn Controller(comptime id: u2) type {
                 const start_timing: Kind = @enumFromInt(new.start_timing.read());
 
                 switch (start_timing) {
-                    .immediate, .vblank => {},
+                    .immediate, .vblank, .hblank => {},
                     else => log.err("TODO: Implement DMA({}) {s} mode", .{ id, @tagName(start_timing) }),
                 }
 

src/core/nds9/io.zig

@@ -65,6 +65,7 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
             0x0400_0210 => bus.io.ie.raw,
             0x0400_0214 => bus.io.irq.raw,
 
+            0x0400_0280 => bus.io.div.cnt.raw,
             0x0400_02A0, 0x0400_02A4 => @truncate(bus.io.div.result >> shift(u64, address)),
             0x0400_02A8, 0x0400_02AC => @truncate(bus.io.div.remainder >> shift(u64, address)),
             0x0400_02B4 => @truncate(bus.io.sqrt.result),
@@ -175,6 +176,8 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
                 bus.wram.update(bus.io.shr.wramcnt);
             },
 
+            0x0400_0280 => bus.io.div.cnt.raw = value,
+
             0x0400_0290, 0x0400_0294 => {
                 bus.io.div.numerator = subset(u64, u32, address, bus.io.div.numerator, value);
                 bus.io.div.schedule(bus.scheduler);
@@ -185,6 +188,11 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
                 bus.io.div.schedule(bus.scheduler);
             },
 
+            0x0400_02A0, 0x0400_02A4 => bus.io.div.result = subset(u64, u32, address, bus.io.div.result, value),
+            0x0400_02A8, 0x0400_02AC => bus.io.div.remainder = subset(u64, u32, address, bus.io.div.remainder, value),
+
+            0x0400_02B0 => bus.io.sqrt.cnt.raw = value,
+
             0x0400_02B8, 0x0400_02BC => {
                 bus.io.sqrt.param = subset(u64, u32, address, bus.io.sqrt.param, value);
                 bus.io.sqrt.schedule(bus.scheduler);