tmp: kind of implement IPCFIFO IRQs
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825b6e95ac
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f59ad9bef5
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@ -125,6 +125,13 @@ const Ipc = struct {
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if (!self._nds7.cnt.enable_fifos.read()) return;
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if (!self._nds7.cnt.enable_fifos.read()) return;
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try self._nds7.fifo.push(value);
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try self._nds7.fifo.push(value);
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if (self._nds9.cnt.recv_fifo_irq_enable.read()) {
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const bus: *System.Bus9 = @ptrCast(@alignCast(self.arm946es.?.bus.ptr));
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bus.io.irq.ipc_recv_not_empty.set();
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handleInterrupt(.nds9, self.arm946es.?);
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}
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// update status bits
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// update status bits
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self._nds7.cnt.send_fifo_empty.write(self._nds7.fifo._len() == 0);
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self._nds7.cnt.send_fifo_empty.write(self._nds7.fifo._len() == 0);
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self._nds9.cnt.recv_fifo_empty.write(self._nds7.fifo._len() == 0);
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self._nds9.cnt.recv_fifo_empty.write(self._nds7.fifo._len() == 0);
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@ -136,6 +143,13 @@ const Ipc = struct {
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if (!self._nds9.cnt.enable_fifos.read()) return;
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if (!self._nds9.cnt.enable_fifos.read()) return;
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try self._nds9.fifo.push(value);
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try self._nds9.fifo.push(value);
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if (self._nds7.cnt.recv_fifo_irq_enable.read()) {
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const bus: *System.Bus7 = @ptrCast(@alignCast(self.arm7tdmi.?.bus.ptr));
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bus.io.irq.ipc_recv_not_empty.set();
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handleInterrupt(.nds7, self.arm7tdmi.?);
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}
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// update status bits
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// update status bits
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self._nds9.cnt.send_fifo_empty.write(self._nds9.fifo._len() == 0);
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self._nds9.cnt.send_fifo_empty.write(self._nds9.fifo._len() == 0);
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self._nds7.cnt.recv_fifo_empty.write(self._nds9.fifo._len() == 0);
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self._nds7.cnt.recv_fifo_empty.write(self._nds9.fifo._len() == 0);
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@ -159,6 +173,13 @@ const Ipc = struct {
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break :blk val;
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break :blk val;
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} else blk: {
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} else blk: {
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self._nds7.cnt.fifo_error.set();
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self._nds7.cnt.fifo_error.set();
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if (self._nds9.cnt.send_fifo_irq_enable.read()) {
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const bus: *System.Bus9 = @ptrCast(@alignCast(self.arm946es.?.bus.ptr));
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bus.io.irq.ipc_send_empty.set();
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handleInterrupt(.nds9, self.arm946es.?);
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}
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break :blk self._nds7.last_read orelse 0x0000_0000;
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break :blk self._nds7.last_read orelse 0x0000_0000;
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};
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};
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@ -180,6 +201,14 @@ const Ipc = struct {
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break :blk val;
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break :blk val;
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} else blk: {
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} else blk: {
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self._nds9.cnt.fifo_error.set();
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self._nds9.cnt.fifo_error.set();
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if (self._nds7.cnt.send_fifo_irq_enable.read()) {
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const bus: *System.Bus7 = @ptrCast(@alignCast(self.arm7tdmi.?.bus.ptr));
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bus.io.irq.ipc_send_empty.set();
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handleInterrupt(.nds7, self.arm7tdmi.?);
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}
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break :blk self._nds7.last_read orelse 0x0000_0000;
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break :blk self._nds7.last_read orelse 0x0000_0000;
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};
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};
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@ -278,6 +307,8 @@ pub const masks = struct {
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// FIXME: bitfields depends on NDS9 / NDS7
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// FIXME: bitfields depends on NDS9 / NDS7
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pub const IntEnable = extern union {
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pub const IntEnable = extern union {
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ipcsync: Bit(u32, 16),
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ipcsync: Bit(u32, 16),
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ipc_send_empty: Bit(u32, 17),
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ipc_recv_not_empty: Bit(u32, 18),
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raw: u32,
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raw: u32,
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};
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};
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