From f59ad9bef577238bc339ee55c80dfe971ffb1c48 Mon Sep 17 00:00:00 2001
From: paoda <rekai@musuka.dev>
Date: Mon, 9 Oct 2023 11:51:19 -0500
Subject: [PATCH] tmp: kind of implement IPCFIFO IRQs

---
 src/core/io.zig | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/src/core/io.zig b/src/core/io.zig
index 938d6a5..505695f 100644
--- a/src/core/io.zig
+++ b/src/core/io.zig
@@ -125,6 +125,13 @@ const Ipc = struct {
                 if (!self._nds7.cnt.enable_fifos.read()) return;
                 try self._nds7.fifo.push(value);
 
+                if (self._nds9.cnt.recv_fifo_irq_enable.read()) {
+                    const bus: *System.Bus9 = @ptrCast(@alignCast(self.arm946es.?.bus.ptr));
+                    bus.io.irq.ipc_recv_not_empty.set();
+
+                    handleInterrupt(.nds9, self.arm946es.?);
+                }
+
                 // update status bits
                 self._nds7.cnt.send_fifo_empty.write(self._nds7.fifo._len() == 0);
                 self._nds9.cnt.recv_fifo_empty.write(self._nds7.fifo._len() == 0);
@@ -136,6 +143,13 @@ const Ipc = struct {
                 if (!self._nds9.cnt.enable_fifos.read()) return;
                 try self._nds9.fifo.push(value);
 
+                if (self._nds7.cnt.recv_fifo_irq_enable.read()) {
+                    const bus: *System.Bus7 = @ptrCast(@alignCast(self.arm7tdmi.?.bus.ptr));
+                    bus.io.irq.ipc_recv_not_empty.set();
+
+                    handleInterrupt(.nds7, self.arm7tdmi.?);
+                }
+
                 // update status bits
                 self._nds9.cnt.send_fifo_empty.write(self._nds9.fifo._len() == 0);
                 self._nds7.cnt.recv_fifo_empty.write(self._nds9.fifo._len() == 0);
@@ -159,6 +173,13 @@ const Ipc = struct {
                     break :blk val;
                 } else blk: {
                     self._nds7.cnt.fifo_error.set();
+                    if (self._nds9.cnt.send_fifo_irq_enable.read()) {
+                        const bus: *System.Bus9 = @ptrCast(@alignCast(self.arm946es.?.bus.ptr));
+                        bus.io.irq.ipc_send_empty.set();
+
+                        handleInterrupt(.nds9, self.arm946es.?);
+                    }
+
                     break :blk self._nds7.last_read orelse 0x0000_0000;
                 };
 
@@ -180,6 +201,14 @@ const Ipc = struct {
                     break :blk val;
                 } else blk: {
                     self._nds9.cnt.fifo_error.set();
+
+                    if (self._nds7.cnt.send_fifo_irq_enable.read()) {
+                        const bus: *System.Bus7 = @ptrCast(@alignCast(self.arm7tdmi.?.bus.ptr));
+                        bus.io.irq.ipc_send_empty.set();
+
+                        handleInterrupt(.nds7, self.arm7tdmi.?);
+                    }
+
                     break :blk self._nds7.last_read orelse 0x0000_0000;
                 };
 
@@ -278,6 +307,8 @@ pub const masks = struct {
 // FIXME: bitfields depends on NDS9 / NDS7
 pub const IntEnable = extern union {
     ipcsync: Bit(u32, 16),
+    ipc_send_empty: Bit(u32, 17),
+    ipc_recv_not_empty: Bit(u32, 18),
     raw: u32,
 };