chore: stub NDS7 DMA registers
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7f4dad485f
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@ -115,11 +115,11 @@ const Ipc = struct {
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/// IPC Send FIFO
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/// Write-Only
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pub fn send(self: *@This(), comptime src: Source, value: u32) !void {
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pub fn send(self: *@This(), comptime src: Source, value: u32) void {
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switch (src) {
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.nds7 => {
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if (!self._nds7.cnt.enable_fifos.read()) return;
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try self._nds7.fifo.push(value);
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self._nds7.fifo.push(value) catch unreachable; // see early return above
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const not_empty_cache = !self._nds9.cnt.recv_fifo_empty.read();
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@ -143,7 +143,7 @@ const Ipc = struct {
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},
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.nds9 => {
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if (!self._nds9.cnt.enable_fifos.read()) return;
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try self._nds9.fifo.push(value);
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self._nds9.fifo.push(value) catch unreachable; // see early return above
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const not_empty_cache = !self._nds7.cnt.recv_fifo_empty.read();
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@ -45,6 +45,13 @@ pub const Io = struct {
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pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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return switch (T) {
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u32 => switch (address) {
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// DMA Transfers
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0x0400_00B0...0x0400_00DC => warn("TODO: Implement DMA", .{}),
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// Timers
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0x0400_0100...0x0400_010C => warn("TODO: Implement Timer", .{}),
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0x0400_0180 => bus.io.shr.ipc._nds7.sync.raw,
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0x0400_0208 => @intFromBool(bus.io.ime),
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0x0400_0210 => bus.io.ie.raw,
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0x0400_0214 => bus.io.irq.raw,
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@ -53,11 +60,23 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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u16 => switch (address) {
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// DMA Transfers
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0x0400_00B0...0x0400_00DE => warn("TODO: Implement DMA", .{}),
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// Timers
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0x0400_0100...0x0400_010E => warn("TODO: Implement Timer", .{}),
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0x0400_0180 => @truncate(bus.io.shr.ipc._nds7.sync.raw),
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0x0400_0184 => @truncate(bus.io.shr.ipc._nds7.cnt.raw),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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u8 => switch (address) {
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// DMA Transfers
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0x0400_00B0...0x0400_00DF => warn("TODO: Implement DMA", .{}),
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// Timers
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0x0400_0100...0x0400_010F => warn("TODO: Implement Timer", .{}),
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0x0400_0240 => bus.vram.stat().raw,
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0x0400_0241 => bus.io.shr.wramcnt.raw,
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@ -71,19 +90,38 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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switch (T) {
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u32 => switch (address) {
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// DMA Transfers
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0x0400_00B0...0x0400_00DC => log.warn("TODO: Implement DMA", .{}),
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// Timers
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0x0400_0100...0x0400_010C => log.warn("TODO: Implement Timer", .{}),
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0x0400_0180 => bus.io.shr.ipc.setIpcSync(.nds7, value),
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0x0400_0208 => bus.io.ime = value & 1 == 1,
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0x0400_0210 => bus.io.ie.raw = value,
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0x0400_0214 => bus.io.irq.raw &= ~value,
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0x0400_0188 => bus.io.shr.ipc.send(.nds7, value) catch |e| std.debug.panic("FIFO error: {}", .{e}),
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0x0400_0188 => bus.io.shr.ipc.send(.nds7, value),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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u16 => switch (address) {
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// DMA Transfers
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0x0400_00B0...0x0400_00DE => log.warn("TODO: Implement DMA", .{}),
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// Timers
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0x0400_0100...0x0400_010E => log.warn("TODO: Implement Timer", .{}),
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0x0400_0180 => bus.io.shr.ipc.setIpcSync(.nds7, value),
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0x0400_0184 => bus.io.shr.ipc.setIpcFifoCnt(.nds7, value),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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u8 => switch (address) {
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// DMA Transfers
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0x0400_00B0...0x0400_00DF => log.warn("TODO: Implement DMA", .{}),
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// Timers
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0x0400_0100...0x0400_010F => log.warn("TODO: Implement Timer", .{}),
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0x0400_0208 => bus.io.ime = value & 1 == 1,
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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@ -11,6 +11,7 @@ const IntEnable = @import("../io.zig").IntEnable;
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const IntRequest = @import("../io.zig").IntEnable;
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const sext = @import("../../util.zig").sext;
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const shift = @import("../../util.zig").shift;
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const log = std.log.scoped(.nds9_io);
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@ -52,16 +53,17 @@ pub const Io = struct {
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pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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return switch (T) {
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u32 => switch (address) {
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0x0400_0180 => bus.io.shr.ipc._nds9.sync.raw,
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0x0400_0208 => @intFromBool(bus.io.ime),
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0x0400_0210 => bus.io.ie.raw,
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0x0400_0214 => bus.io.irq.raw,
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0x0400_02A0 => @truncate(bus.io.div.result),
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0x0400_02A4 => @truncate(bus.io.div.result >> 32),
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0x0400_02A8 => @truncate(bus.io.div.remainder),
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0x0400_02AC => @truncate(bus.io.div.remainder >> 32),
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0x0400_02A0, 0x0400_02A4 => @truncate(bus.io.div.result >> shift(u64, address)),
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0x0400_02A8, 0x0400_02AC => @truncate(bus.io.div.remainder >> shift(u64, address)),
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0x0400_02B4 => @truncate(bus.io.sqrt.result),
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0x0400_4008 => 0x0000_0000, // Lets software know this is NOT a DSi
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0x0410_0000 => bus.io.shr.ipc.recv(.nds9),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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@ -78,19 +80,22 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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u8 => switch (address) {
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0x0400_4000 => 0x00, // Lets software know this is NOT a DSi
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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else => @compileError(T ++ " is an unsupported bus read type"),
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};
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}
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const subset = @import("../../util.zig").subset;
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pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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switch (T) {
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u32 => switch (address) {
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0x0400_0000 => bus.ppu.io.dispcnt_a.raw = value,
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0x0400_0180 => bus.io.shr.ipc.setIpcSync(.nds9, value),
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0x0400_0184 => bus.io.shr.ipc.setIpcFifoCnt(.nds9, value),
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0x0400_0188 => bus.io.shr.ipc.send(.nds9, value) catch |e| std.debug.panic("IPC FIFO Error: {}", .{e}),
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0x0400_0188 => bus.io.shr.ipc.send(.nds9, value),
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0x0400_0240 => {
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bus.ppu.vram.io.cnt_a.raw = @truncate(value >> 0); // 0x0400_0240
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@ -103,28 +108,18 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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0x0400_0210 => bus.io.ie.raw = value,
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0x0400_0214 => bus.io.irq.raw &= ~value,
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0x0400_0290 => {
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bus.io.div.numerator = masks.mask(bus.io.div.numerator, value, 0xFFFF_FFFF);
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0x0400_0290, 0x0400_0294 => {
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bus.io.div.numerator = subset(u64, u32, address, bus.io.div.numerator, value);
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bus.io.div.schedule(bus.scheduler);
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},
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0x0400_0294 => {
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bus.io.div.numerator = masks.mask(bus.io.div.numerator, @as(u64, value) << 32, 0xFFFF_FFFF << 32);
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0x0400_0298, 0x0400_029C => {
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bus.io.div.denominator = subset(u64, u32, address, bus.io.div.denominator, value);
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bus.io.div.schedule(bus.scheduler);
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},
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0x0400_0298 => {
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bus.io.div.denominator = masks.mask(bus.io.div.denominator, value, 0xFFFF_FFFF);
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bus.io.div.schedule(bus.scheduler);
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},
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0x0400_029C => {
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bus.io.div.denominator = masks.mask(bus.io.div.denominator, @as(u64, value) << 32, 0xFFFF_FFFF << 32);
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bus.io.div.schedule(bus.scheduler);
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},
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0x0400_02B8 => {
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bus.io.sqrt.param = masks.mask(bus.io.sqrt.param, value, 0xFFFF_FFFF);
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bus.io.sqrt.schedule(bus.scheduler);
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},
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0x0400_02BC => {
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bus.io.sqrt.param = masks.mask(bus.io.sqrt.param, @as(u64, value) << 32, 0xFFFF_FFFF << 32);
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0x0400_02B8, 0x0400_02BC => {
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bus.io.sqrt.param = subset(u64, u32, address, bus.io.sqrt.param, value);
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bus.io.sqrt.schedule(bus.scheduler);
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},
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@ -147,6 +142,8 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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bus.io.sqrt.schedule(bus.scheduler);
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},
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0x0400_0304 => bus.io.powcnt.raw = value,
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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u8 => switch (address) {
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@ -205,10 +202,10 @@ fn warn(comptime format: []const u8, args: anytype) u0 {
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const PowCnt = extern union {
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// Enable flag for both LCDs
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lcd: Bit(u32, 0),
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gfx_2da: Bit(u32, 1),
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render_3d: Bit(u32, 2),
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geometry_3d: Bit(u32, 3),
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gfx_2db: Bit(u32, 9),
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engine2d_a: Bit(u32, 1),
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render3d: Bit(u32, 2),
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geometry3d: Bit(u32, 3),
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engine2d_b: Bit(u32, 9),
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display_swap: Bit(u32, 15),
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raw: u32,
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};
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49
src/util.zig
49
src/util.zig
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@ -1,4 +1,5 @@
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const std = @import("std");
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const Log2Int = std.math.Log2Int;
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const assert = std.debug.assert;
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@ -102,3 +103,51 @@ test "FittingInt" {
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try std.testing.expect(FittingInt(0b101) == i3);
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try std.testing.expect(FittingInt(0b1010) == i4);
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}
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/// TODO: Document this properly :)
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pub inline fn shift(comptime T: type, addr: u32) Log2Int(T) {
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const offset: Log2Int(T) = @truncate(addr & (@sizeOf(T) - 1));
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return offset << 3;
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}
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/// TODO: Document this properly :)
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pub inline fn subset(comptime T: type, comptime U: type, addr: u32, left: T, right: U) T {
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const offset: Log2Int(T) = @truncate(addr & (@sizeOf(T) - 1));
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const mask = @as(T, std.math.maxInt(U)) << (offset << 3);
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const value = @as(T, right) << (offset << 3);
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return (value & mask) | (left & ~mask);
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}
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test "subset" {
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const expectEqual = std.testing.expectEqual;
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try expectEqual(@as(u16, 0xABAA), subset(u16, u8, 0x0000_0000, 0xABCD, 0xAA));
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try expectEqual(@as(u16, 0xAACD), subset(u16, u8, 0x0000_0001, 0xABCD, 0xAA));
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try expectEqual(@as(u32, 0xDEAD_BEAA), subset(u32, u8, 0x0000_0000, 0xDEAD_BEEF, 0xAA));
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try expectEqual(@as(u32, 0xDEAD_AAEF), subset(u32, u8, 0x0000_0001, 0xDEAD_BEEF, 0xAA));
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try expectEqual(@as(u32, 0xDEAA_BEEF), subset(u32, u8, 0x0000_0002, 0xDEAD_BEEF, 0xAA));
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try expectEqual(@as(u32, 0xAAAD_BEEF), subset(u32, u8, 0x0000_0003, 0xDEAD_BEEF, 0xAA));
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try expectEqual(@as(u32, 0xDEAD_AAAA), subset(u32, u16, 0x0000_0000, 0xDEAD_BEEF, 0xAAAA));
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try expectEqual(@as(u32, 0xAAAA_BEEF), subset(u32, u16, 0x0000_0002, 0xDEAD_BEEF, 0xAAAA));
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try expectEqual(@as(u64, 0xBAAD_F00D_DEAD_CAAA), subset(u64, u8, 0x0000_0000, 0xBAAD_F00D_DEAD_CAFE, 0xAA));
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try expectEqual(@as(u64, 0xBAAD_F00D_DEAD_AAFE), subset(u64, u8, 0x0000_0001, 0xBAAD_F00D_DEAD_CAFE, 0xAA));
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try expectEqual(@as(u64, 0xBAAD_F00D_DEAA_CAFE), subset(u64, u8, 0x0000_0002, 0xBAAD_F00D_DEAD_CAFE, 0xAA));
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try expectEqual(@as(u64, 0xBAAD_F00D_AAAD_CAFE), subset(u64, u8, 0x0000_0003, 0xBAAD_F00D_DEAD_CAFE, 0xAA));
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try expectEqual(@as(u64, 0xBAAD_F0AA_DEAD_CAFE), subset(u64, u8, 0x0000_0004, 0xBAAD_F00D_DEAD_CAFE, 0xAA));
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try expectEqual(@as(u64, 0xBAAD_AA0D_DEAD_CAFE), subset(u64, u8, 0x0000_0005, 0xBAAD_F00D_DEAD_CAFE, 0xAA));
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try expectEqual(@as(u64, 0xBAAA_F00D_DEAD_CAFE), subset(u64, u8, 0x0000_0006, 0xBAAD_F00D_DEAD_CAFE, 0xAA));
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try expectEqual(@as(u64, 0xAAAD_F00D_DEAD_CAFE), subset(u64, u8, 0x0000_0007, 0xBAAD_F00D_DEAD_CAFE, 0xAA));
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try expectEqual(@as(u64, 0xBAAD_F00D_DEAD_AAAA), subset(u64, u16, 0x0000_0000, 0xBAAD_F00D_DEAD_CAFE, 0xAAAA));
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try expectEqual(@as(u64, 0xBAAD_F00D_AAAA_CAFE), subset(u64, u16, 0x0000_0002, 0xBAAD_F00D_DEAD_CAFE, 0xAAAA));
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try expectEqual(@as(u64, 0xBAAD_AAAA_DEAD_CAFE), subset(u64, u16, 0x0000_0004, 0xBAAD_F00D_DEAD_CAFE, 0xAAAA));
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try expectEqual(@as(u64, 0xAAAA_F00D_DEAD_CAFE), subset(u64, u16, 0x0000_0006, 0xBAAD_F00D_DEAD_CAFE, 0xAAAA));
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try expectEqual(@as(u64, 0xBAAD_F00D_AAAA_AAAA), subset(u64, u32, 0x0000_0000, 0xBAAD_F00D_DEAD_CAFE, 0xAAAA_AAAA));
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try expectEqual(@as(u64, 0xAAAA_AAAA_DEAD_CAFE), subset(u64, u32, 0x0000_0004, 0xBAAD_F00D_DEAD_CAFE, 0xAAAA_AAAA));
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}
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