Commit Graph

57 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka e8e6c41dbe fix(dma): initial version of dma transfer now works 2021-06-06 23:57:54 -05:00
Rekai Nyangadzayi Musuka ef4e54aba6 chore: restrict what should be pub or not 2021-06-06 20:47:11 -05:00
Rekai Nyangadzayi Musuka 878edd4082 chore: replace pub with pub(crate) when possible 2021-06-06 19:14:28 -05:00
Rekai Nyangadzayi Musuka b7b213b6b9 chore(bus): implement read/write blocks when dma is active 2021-06-05 20:53:35 -05:00
Rekai Nyangadzayi Musuka b1bf6c5868 feat: integrate eui and pixels-rs for debug info 2021-06-02 01:50:35 -05:00
Rekai Nyangadzayi Musuka 4ab59007f9 chore(cpu): disable logging by default 2021-04-23 23:31:16 -05:00
Rekai Nyangadzayi Musuka b43c8ac7c9 feat(cartridge): grab title from the ROM 2021-04-14 01:21:45 -05:00
Rekai Nyangadzayi Musuka cf3b79f0dc chore(cpu): move RST behaviour to a method 2021-04-07 23:05:22 -05:00
Rekai Nyangadzayi Musuka 067ed03de3 feat: comply with test 03 of blargg's cpu_instrs test rom 2021-04-07 20:12:05 -05:00
Rekai Nyangadzayi Musuka 9b77d6c6c3 fix(cpu): ensure that timer, lcd and sound runs regardless of HALT 2021-04-05 01:20:18 -05:00
Rekai Nyangadzayi Musuka 9d2fbd2427 chore: remove unecessary print statements 2021-04-05 01:20:03 -05:00
Rekai Nyangadzayi Musuka 748c32c446 fix(cpu): use enums only of maintaining IME register state 2021-04-05 01:10:03 -05:00
Rekai Nyangadzayi Musuka 77c7c610d0 chore(cpu): rename ImeSet to ImeEnabled 2021-04-05 00:53:46 -05:00
Rekai Nyangadzayi Musuka a15a6a25b6 feat(cpu): properly implement EI instruction 2021-04-05 00:52:12 -05:00
Rekai Nyangadzayi Musuka 4dd7a0d9ce chore: fix several clippy warnings 2021-04-04 01:19:39 -05:00
Rekai Nyangadzayi Musuka 25e44f3e49 chore: fix condition when logs are printed 2021-03-27 15:07:17 -05:00
Rekai Nyangadzayi Musuka 2b05571c49 chore: rename Cycles newtype to Cycle 2021-03-27 12:10:18 -05:00
Rekai Nyangadzayi Musuka bce14348f8 feat: enable halt and rework timer registers 2021-03-27 11:56:47 -05:00
Rekai Nyangadzayi Musuka 2bf877d1ec fix(cpu): Ensure mask the high bits of the flag register
There was a bug where POP AF returned 0x1301. In this example, the A
register would be set to 0x13, and the Flag register woud be set to
0x01, which is an invalid state considering only bits 4 -> 7 of the flag
register are used. This commit masks the flag register with & 0xF0
whenever it is read or written to so that we can ensure that only the
high bits can ever be potentially set
2021-03-26 20:25:30 -05:00
Rekai Nyangadzayi Musuka a82e3d3372 feat: implement HALT behaviour
note: while the logic is there, the instruction currently does not do
anything because we don't halde it in Cpu::step(). The code that does is
currently commented out and there should be some underlying bugs still
present. Nevertheless it is a good start
2021-03-23 23:05:27 -05:00
Rekai Nyangadzayi Musuka 6f11640f24 chore: replace CALL instruction with RST in interrupt handler 2021-03-23 02:11:06 -05:00
Rekai Nyangadzayi Musuka 45466a5733 feat: implement clap for cli and improve error messages 2021-03-22 21:41:22 -05:00
Rekai Nyangadzayi Musuka d7d9fd857f fix: squash bugs in cpu intrucion implementation 2021-03-21 21:16:23 -05:00
Rekai Nyangadzayi Musuka 8a1540c9e9 fix: replaced unnecessary &mut self with &self 2021-03-21 19:56:38 -05:00
Rekai Nyangadzayi Musuka 5a42d76f1e feat: implement LCDSTAT interrupt 2021-03-21 00:01:21 -05:00
Rekai Nyangadzayi Musuka 558f9e7c72 feat: implement cpu interrupts 2021-03-18 21:07:19 -05:00
Rekai Nyangadzayi Musuka 19f642eafe chore: make clippy happy 2021-03-16 01:05:13 -05:00
Rekai Nyangadzayi Musuka 3b5d94adfc fix: reimplement flags register to be a bitfield 2021-03-15 23:35:20 -05:00
Rekai Nyangadzayi Musuka d30ce4dbb2 chore: improve code quailty 2021-03-15 19:19:40 -05:00
Rekai Nyangadzayi Musuka b053260c8b feat: don't embed gb boot rom in emulator 2021-01-27 22:07:31 -06:00
Rekai Nyangadzayi Musuka b5d3a2c675 feat: implement MBC1 2021-01-20 01:39:24 -06:00
Rekai Nyangadzayi Musuka 842e670807 fix: replace MathTarget::HL and ::SP with already-existing enums 2021-01-19 02:05:04 -06:00
Rekai Nyangadzayi Musuka 68c9557c43 chore: improve code quality 2021-01-19 01:36:44 -06:00
Rekai Nyangadzayi Musuka 9b4c95ce4c feat: reimplement cycles newtype 2021-01-18 22:54:38 -06:00
Rekai Nyangadzayi Musuka 2fc7ac3833 feat: add pixels-rs and winit as dependencies 2021-01-18 20:47:09 -06:00
Rekai Nyangadzayi Musuka 9203b61533 fix: implement 0xff41 and fix CALL instruciton 2021-01-18 02:22:45 -06:00
Rekai Nyangadzayi Musuka 386a780a6f fix: call opcode now pushes correct address onto stack 2021-01-17 22:12:00 -06:00
Rekai Nyangadzayi Musuka c0b8b8bda2 feat: implement more registers 2021-01-17 21:13:59 -06:00
Rekai Nyangadzayi Musuka 677a584ba7 chore: stub vram, start work on ppu, fix set_register bug 2020-12-23 21:24:58 -06:00
Rekai Nyangadzayi Musuka 2a234f4d14 feat: implement ability to boot straigt to cartridge 2020-12-23 19:39:37 -06:00
Rekai Nyangadzayi Musuka 4d2e0e33f2 feat: implement fetch, decode, execute loop 2020-12-23 03:25:16 -06:00
Rekai Nyangadzayi Musuka 4bf9ccb98c chore: qol update 2020-12-22 22:23:09 -06:00
Rekai Nyangadzayi Musuka 213c5e5cb3 Implement more instructions 2020-09-04 00:41:19 -05:00
Rekai Nyangadzayi Musuka 49dac85470 Utilize pattern matching more 2020-09-02 19:35:48 -05:00
Rekai Nyangadzayi Musuka cb365fd932 Implement Instructions and rename enums 2020-09-02 17:26:46 -05:00
Rekai Nyangadzayi Musuka 0be0030ed7 Implement CPU Instructions 2020-09-01 00:16:05 -05:00
Rekai Nyangadzayi Musuka 21b7f82422 Decode all unprefixed opcodes 2020-08-29 23:07:53 -05:00
Rekai Nyangadzayi Musuka e0235094bb Implement basic layout of Gameboy Emulator 2020-08-29 18:38:27 -05:00
Rekai Nyangadzayi Musuka 0401bb7e49 Restart Project 2020-08-25 12:10:38 -05:00
Rekai Musuka f97bf9dbb7 Stub Bus, and CPU, implement some opcode decoding. 2020-08-06 01:05:16 -05:00