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fix(apu): abstract wave RAM behind BusIO trait

This commit is contained in:
Rekai Nyangadzayi Musuka 2021-07-25 18:03:11 -05:00
parent 9e36e86c14
commit e4d77d66ba
2 changed files with 17 additions and 3 deletions
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16
src/apu.rs
View File

@ -1,3 +1,4 @@
use crate::bus::BusIo;
use crate::emu::SM83_CLOCK_SPEED;
use gen::{AudioBuffer, AudioSender};
use types::ch1::{Sweep, SweepDirection};
@ -611,7 +612,8 @@ pub(crate) struct Channel3 {
freq_lo: u8,
/// 0xFF1E | NR34 - Channel 3 Frequency high
freq_hi: FrequencyHigh,
pub(crate) wave_ram: [u8; WAVE_PATTERN_RAM_LEN],
wave_ram: [u8; WAVE_PATTERN_RAM_LEN],
// Length Functionality
length_timer: u16,
@ -620,7 +622,19 @@ pub(crate) struct Channel3 {
offset: u8,
}
impl BusIo for Channel3 {
fn read_byte(&self, addr: u16) -> u8 {
self.wave_ram[(addr - Self::WAVE_RAM_START_ADDR) as usize]
}
fn write_byte(&mut self, addr: u16, byte: u8) {
self.wave_ram[(addr - Self::WAVE_RAM_START_ADDR) as usize] = byte;
}
}
impl Channel3 {
const WAVE_RAM_START_ADDR: u16 = 0xFF30;
/// 0xFF1A | NR30 - Channel 3 Sound on/off
pub(crate) fn enabled(&self) -> u8 {
((self.enabled as u8) << 7) | 0x7F

4
src/bus.rs
View File

@ -242,7 +242,7 @@ impl BusIo for Bus {
0x24 => self.apu.ctrl.channel(),
0x25 => self.apu.ctrl.output(),
0x26 => self.apu.ctrl.status(&self.apu),
0x30..=0x3F => self.apu.ch3.wave_ram[addr as usize - 0xFF30],
0x30..=0x3F => self.apu.ch3.read_byte(addr),
0x40 => self.ppu.ctrl.into(),
0x41 => self.ppu.stat.into(),
0x42 => self.ppu.pos.scroll_y,
@ -363,7 +363,7 @@ impl BusIo for Bus {
0x24 => self.apu.ctrl.set_channel(byte),
0x25 => self.apu.ctrl.set_output(byte),
0x26 => self.apu.set_status(byte),
0x30..=0x3F => self.apu.ch3.wave_ram[addr as usize - 0xFF30] = byte,
0x30..=0x3F => self.apu.ch3.write_byte(addr, byte),
0x40 => self.ppu.ctrl = byte.into(),
0x41 => self.ppu.stat.update(byte),
0x42 => self.ppu.pos.scroll_y = byte,