chore(bus): temporarily disable VRAM and OAM gates

There appears to be severe timing issues in the ppu which result in
regressions with these gates enabled. They are commented out for now,
but will be re-enabled once the timing issues in the PPU are fixed
This commit is contained in:
Rekai Nyangadzayi Musuka 2021-06-07 00:01:40 -05:00
parent e8e6c41dbe
commit d5e67568dd
1 changed files with 27 additions and 16 deletions

View File

@ -159,10 +159,14 @@ impl BusIo for Bus {
} }
0x8000..=0x9FFF => { 0x8000..=0x9FFF => {
// 8KB Video RAM // 8KB Video RAM
match self.ppu.stat.mode() {
PpuMode::VBlank => 0xFF, // TODO: Fix Timing issues in PPU
_ => self.ppu.read_byte(addr), // match self.ppu.stat.mode() {
} // PpuMode::VBlank => 0xFF,
// _ => self.ppu.read_byte(addr),
// }
self.ppu.read_byte(addr)
} }
0xA000..=0xBFFF => match self.cartridge.as_ref() { 0xA000..=0xBFFF => match self.cartridge.as_ref() {
// 8KB External RAM // 8KB External RAM
@ -189,12 +193,16 @@ impl BusIo for Bus {
} }
0xFE00..=0xFE9F => { 0xFE00..=0xFE9F => {
// Sprite Attribute Table // Sprite Attribute Table
use PpuMode::{HBlank, VBlank};
match self.ppu.stat.mode() { // TODO: Fix timing issues in the PPU
HBlank | VBlank => self.ppu.oam.read_byte(addr), // use PpuMode::{HBlank, VBlank};
_ => 0xFF,
} // match self.ppu.stat.mode() {
// HBlank | VBlank => self.ppu.oam.read_byte(addr),
// _ => 0xFF,
// }
self.ppu.oam.read_byte(addr)
} }
0xFEA0..=0xFEFF => { 0xFEA0..=0xFEFF => {
// Prohibited Memory // Prohibited Memory
@ -264,10 +272,14 @@ impl BusIo for Bus {
} }
0x8000..=0x9FFF => { 0x8000..=0x9FFF => {
// 8KB Video RAM // 8KB Video RAM
match self.ppu.stat.mode() {
PpuMode::VBlank => {} // TODO: Fix timing issues in the PPU
_ => self.ppu.write_byte(addr, byte), // match self.ppu.stat.mode() {
} // PpuMode::VBlank => {}
// _ => self.ppu.write_byte(addr, byte),
// }
self.ppu.write_byte(addr, byte)
} }
0xA000..=0xBFFF => { 0xA000..=0xBFFF => {
// 8KB External RAM // 8KB External RAM
@ -298,13 +310,12 @@ impl BusIo for Bus {
// Sprite Attribute Table // Sprite Attribute Table
// use PpuMode::{HBlank, VBlank}; // use PpuMode::{HBlank, VBlank};
// FIXME: There is most definitely something wrong with the // TODO: Fix Timing issues in the PPU
// PPU Timing
//
// match self.ppu.stat.mode() { // match self.ppu.stat.mode() {
// HBlank | VBlank => self.ppu.oam.write_byte(addr, byte), // HBlank | VBlank => self.ppu.oam.write_byte(addr, byte),
// _ => {} // _ => {}
// } // }
self.ppu.oam.write_byte(addr, byte) self.ppu.oam.write_byte(addr, byte)
} }
0xFEA0..=0xFEFF => {} // TODO: As far as I know, writes to here do nothing. 0xFEA0..=0xFEFF => {} // TODO: As far as I know, writes to here do nothing.