From d5e67568dd62d7f2faee4138b7254f162f213102 Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Mon, 7 Jun 2021 00:01:40 -0500 Subject: [PATCH] chore(bus): temporarily disable VRAM and OAM gates There appears to be severe timing issues in the ppu which result in regressions with these gates enabled. They are commented out for now, but will be re-enabled once the timing issues in the PPU are fixed --- src/bus.rs | 43 +++++++++++++++++++++++++++---------------- 1 file changed, 27 insertions(+), 16 deletions(-) diff --git a/src/bus.rs b/src/bus.rs index 63ed2d3..d57c7d7 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -159,10 +159,14 @@ impl BusIo for Bus { } 0x8000..=0x9FFF => { // 8KB Video RAM - match self.ppu.stat.mode() { - PpuMode::VBlank => 0xFF, - _ => self.ppu.read_byte(addr), - } + + // TODO: Fix Timing issues in PPU + // match self.ppu.stat.mode() { + // PpuMode::VBlank => 0xFF, + // _ => self.ppu.read_byte(addr), + // } + + self.ppu.read_byte(addr) } 0xA000..=0xBFFF => match self.cartridge.as_ref() { // 8KB External RAM @@ -189,12 +193,16 @@ impl BusIo for Bus { } 0xFE00..=0xFE9F => { // Sprite Attribute Table - use PpuMode::{HBlank, VBlank}; - match self.ppu.stat.mode() { - HBlank | VBlank => self.ppu.oam.read_byte(addr), - _ => 0xFF, - } + // TODO: Fix timing issues in the PPU + // use PpuMode::{HBlank, VBlank}; + + // match self.ppu.stat.mode() { + // HBlank | VBlank => self.ppu.oam.read_byte(addr), + // _ => 0xFF, + // } + + self.ppu.oam.read_byte(addr) } 0xFEA0..=0xFEFF => { // Prohibited Memory @@ -264,10 +272,14 @@ impl BusIo for Bus { } 0x8000..=0x9FFF => { // 8KB Video RAM - match self.ppu.stat.mode() { - PpuMode::VBlank => {} - _ => self.ppu.write_byte(addr, byte), - } + + // TODO: Fix timing issues in the PPU + // match self.ppu.stat.mode() { + // PpuMode::VBlank => {} + // _ => self.ppu.write_byte(addr, byte), + // } + + self.ppu.write_byte(addr, byte) } 0xA000..=0xBFFF => { // 8KB External RAM @@ -298,13 +310,12 @@ impl BusIo for Bus { // Sprite Attribute Table // use PpuMode::{HBlank, VBlank}; - // FIXME: There is most definitely something wrong with the - // PPU Timing - // + // TODO: Fix Timing issues in the PPU // match self.ppu.stat.mode() { // HBlank | VBlank => self.ppu.oam.write_byte(addr, byte), // _ => {} // } + self.ppu.oam.write_byte(addr, byte) } 0xFEA0..=0xFEFF => {} // TODO: As far as I know, writes to here do nothing.