chore(bus): temporarily disable VRAM and OAM gates
There appears to be severe timing issues in the ppu which result in regressions with these gates enabled. They are commented out for now, but will be re-enabled once the timing issues in the PPU are fixed
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e8e6c41dbe
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43
src/bus.rs
43
src/bus.rs
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@ -159,10 +159,14 @@ impl BusIo for Bus {
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}
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}
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0x8000..=0x9FFF => {
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0x8000..=0x9FFF => {
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// 8KB Video RAM
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// 8KB Video RAM
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match self.ppu.stat.mode() {
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PpuMode::VBlank => 0xFF,
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// TODO: Fix Timing issues in PPU
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_ => self.ppu.read_byte(addr),
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// match self.ppu.stat.mode() {
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}
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// PpuMode::VBlank => 0xFF,
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// _ => self.ppu.read_byte(addr),
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// }
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self.ppu.read_byte(addr)
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}
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}
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0xA000..=0xBFFF => match self.cartridge.as_ref() {
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0xA000..=0xBFFF => match self.cartridge.as_ref() {
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// 8KB External RAM
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// 8KB External RAM
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@ -189,12 +193,16 @@ impl BusIo for Bus {
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}
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}
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0xFE00..=0xFE9F => {
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0xFE00..=0xFE9F => {
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// Sprite Attribute Table
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// Sprite Attribute Table
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use PpuMode::{HBlank, VBlank};
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match self.ppu.stat.mode() {
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// TODO: Fix timing issues in the PPU
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HBlank | VBlank => self.ppu.oam.read_byte(addr),
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// use PpuMode::{HBlank, VBlank};
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_ => 0xFF,
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}
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// match self.ppu.stat.mode() {
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// HBlank | VBlank => self.ppu.oam.read_byte(addr),
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// _ => 0xFF,
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// }
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self.ppu.oam.read_byte(addr)
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}
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}
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0xFEA0..=0xFEFF => {
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0xFEA0..=0xFEFF => {
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// Prohibited Memory
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// Prohibited Memory
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@ -264,10 +272,14 @@ impl BusIo for Bus {
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}
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}
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0x8000..=0x9FFF => {
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0x8000..=0x9FFF => {
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// 8KB Video RAM
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// 8KB Video RAM
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match self.ppu.stat.mode() {
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PpuMode::VBlank => {}
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// TODO: Fix timing issues in the PPU
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_ => self.ppu.write_byte(addr, byte),
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// match self.ppu.stat.mode() {
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}
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// PpuMode::VBlank => {}
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// _ => self.ppu.write_byte(addr, byte),
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// }
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self.ppu.write_byte(addr, byte)
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}
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}
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0xA000..=0xBFFF => {
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0xA000..=0xBFFF => {
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// 8KB External RAM
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// 8KB External RAM
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@ -298,13 +310,12 @@ impl BusIo for Bus {
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// Sprite Attribute Table
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// Sprite Attribute Table
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// use PpuMode::{HBlank, VBlank};
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// use PpuMode::{HBlank, VBlank};
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// FIXME: There is most definitely something wrong with the
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// TODO: Fix Timing issues in the PPU
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// PPU Timing
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//
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// match self.ppu.stat.mode() {
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// match self.ppu.stat.mode() {
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// HBlank | VBlank => self.ppu.oam.write_byte(addr, byte),
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// HBlank | VBlank => self.ppu.oam.write_byte(addr, byte),
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// _ => {}
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// _ => {}
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// }
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// }
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self.ppu.oam.write_byte(addr, byte)
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self.ppu.oam.write_byte(addr, byte)
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}
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}
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0xFEA0..=0xFEFF => {} // TODO: As far as I know, writes to here do nothing.
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0xFEA0..=0xFEFF => {} // TODO: As far as I know, writes to here do nothing.
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