feat: Implement prefixed opcode decoding
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a9510bed54
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7538f946d4
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@ -35,6 +35,17 @@ pub enum Instruction {
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CALL(JumpCondition, u16),
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PUSH(RegisterPair),
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RST(u8),
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RLC(InstrRegister),
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RRC(InstrRegister),
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RL(InstrRegister),
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RR(InstrRegister),
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SLA(InstrRegister),
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SRA(InstrRegister),
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SWAP(InstrRegister),
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SRL(InstrRegister),
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BIT(u8, InstrRegister),
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RES(u8, InstrRegister),
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SET(u8, InstrRegister),
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}
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#[derive(Debug, Copy, Clone)]
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@ -1159,13 +1170,13 @@ impl Instruction {
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impl Instruction {
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pub fn from_byte(cpu: &Cpu, byte: u8) -> Self {
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if byte == 0xCB {
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Self::from_prefixed_byte(cpu, byte)
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Self::from_prefixed_byte(cpu)
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} else {
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Self::from_unprefixed_byte(cpu, byte)
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}
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}
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fn from_prefixed_byte(cpu: &Cpu, opcode: u8) -> Self {
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fn from_unprefixed_byte(cpu: &Cpu, opcode: u8) -> Self {
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// https://gb-archive.github.io/salvage/decoding_gbz80_opcodes/Decoding%20Gamboy%20Z80%20Opcodes.html
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let x = (opcode >> 6) & 0b00000011;
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let y = (opcode >> 3) & 0b00000111;
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@ -1177,157 +1188,157 @@ impl Instruction {
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let nn = cpu.read_word(cpu.register_pair(RegisterPair::PC) + 1);
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match (x, z, q, y, p) {
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(0, 0, _, 0, _) => Instruction::NOP, // NOP
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(0, 0, _, 1, _) => Instruction::LD(
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(0, 0, _, 0, _) => Self::NOP, // NOP
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(0, 0, _, 1, _) => Self::LD(
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// LD (nn), SP
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LDTarget::ByteAtAddress(nn),
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LDTarget::RegisterPair(RegisterPair::SP),
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),
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(0, 0, _, 2, _) => Instruction::STOP, // STOP
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(0, 0, _, 3, _) => Instruction::JR(JumpCondition::Always, n as i8), // JR d
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(0, 0, _, 4..=7, _) => Instruction::JR(Table::cc(y - 4), n as i8), // JR cc[y - 4], d
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(0, 1, 0, _, _) => Instruction::LD(
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(0, 0, _, 2, _) => Self::STOP, // STOP
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(0, 0, _, 3, _) => Self::JR(JumpCondition::Always, n as i8), // JR d
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(0, 0, _, 4..=7, _) => Self::JR(Table::cc(y - 4), n as i8), // JR cc[y - 4], d
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(0, 1, 0, _, _) => Self::LD(
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// LD rp[p], nn
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LDTarget::RegisterPair(Table::rp(p)),
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LDTarget::ImmediateWord(nn),
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),
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(0, 1, 1, _, _) => Instruction::ADD(
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(0, 1, 1, _, _) => Self::ADD(
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// ADD HL, rp[p]
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MATHTarget::HL,
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MATHTarget::RegisterPair(Table::rp(p)),
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),
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(0, 2, 0, _, 0) => Instruction::LD(
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(0, 2, 0, _, 0) => Self::LD(
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// LD (BC), A
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LDTarget::IndirectRegister(InstrRegisterPair::BC),
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LDTarget::Register(InstrRegister::A),
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),
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(0, 2, 0, _, 1) => Instruction::LD(
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(0, 2, 0, _, 1) => Self::LD(
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// LD (DE), A
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LDTarget::IndirectRegister(InstrRegisterPair::DE),
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LDTarget::Register(InstrRegister::A),
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),
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(0, 2, 1, _, 0) => Instruction::LD(
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(0, 2, 1, _, 0) => Self::LD(
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// LD A, (BC)
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LDTarget::Register(InstrRegister::A),
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LDTarget::IndirectRegister(InstrRegisterPair::BC),
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),
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(0, 2, 1, _, 1) => Instruction::LD(
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(0, 2, 1, _, 1) => Self::LD(
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// LD A, (DE)
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LDTarget::Register(InstrRegister::A),
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LDTarget::IndirectRegister(InstrRegisterPair::DE),
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),
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(0, 2, 0, _, 2) => Instruction::LD(
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(0, 2, 0, _, 2) => Self::LD(
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// LD (HL+), A
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LDTarget::IndirectRegister(InstrRegisterPair::IncrementHL),
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LDTarget::Register(InstrRegister::A),
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),
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(0, 2, 0, _, 3) => Instruction::LD(
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(0, 2, 0, _, 3) => Self::LD(
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// LD (HL-), A
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LDTarget::IndirectRegister(InstrRegisterPair::DecrementHL),
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LDTarget::Register(InstrRegister::A),
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),
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(0, 2, 1, _, 2) => Instruction::LD(
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(0, 2, 1, _, 2) => Self::LD(
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// LD A, (HL+)
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LDTarget::Register(InstrRegister::A),
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LDTarget::IndirectRegister(InstrRegisterPair::IncrementHL),
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),
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(0, 2, 1, _, 3) => Instruction::LD(
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(0, 2, 1, _, 3) => Self::LD(
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// LD A, (HL-)
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LDTarget::Register(InstrRegister::A),
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LDTarget::IndirectRegister(InstrRegisterPair::DecrementHL),
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),
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(0, 3, 0, _, _) => Instruction::INC(
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(0, 3, 0, _, _) => Self::INC(
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// INC rp[p]
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Registers::Word(Table::rp(p)),
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),
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(0, 3, 1, _, _) => Instruction::DEC(
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(0, 3, 1, _, _) => Self::DEC(
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// DEC rp[p]
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Registers::Word(Table::rp(p)),
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),
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(0, 4, _, _, _) => Instruction::INC(
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(0, 4, _, _, _) => Self::INC(
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// INC r[y]
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Registers::Byte(Table::r(y)),
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),
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(0, 5, _, _, _) => Instruction::DEC(
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(0, 5, _, _, _) => Self::DEC(
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// DEC r[y]
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Registers::Byte(Table::r(y)),
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),
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(0, 6, _, _, _) => Instruction::LD(
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(0, 6, _, _, _) => Self::LD(
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// LD r[y], n
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LDTarget::Register(Table::r(y)),
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LDTarget::ImmediateByte(n),
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),
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(0, 7, _, 0, _) => Instruction::RLCA,
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(0, 7, _, 1, _) => Instruction::RRCA,
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(0, 7, _, 2, _) => Instruction::RLA,
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(0, 7, _, 3, _) => Instruction::RRA,
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(0, 7, _, 4, _) => Instruction::DAA,
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(0, 7, _, 5, _) => Instruction::CPL,
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(0, 7, _, 6, _) => Instruction::SCF,
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(0, 7, _, 7, _) => Instruction::CCF,
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(1, 6, _, 6, _) => Instruction::HALT,
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(1, _, _, _, _) => Instruction::LD(
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(0, 7, _, 0, _) => Self::RLCA,
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(0, 7, _, 1, _) => Self::RRCA,
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(0, 7, _, 2, _) => Self::RLA,
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(0, 7, _, 3, _) => Self::RRA,
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(0, 7, _, 4, _) => Self::DAA,
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(0, 7, _, 5, _) => Self::CPL,
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(0, 7, _, 6, _) => Self::SCF,
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(0, 7, _, 7, _) => Self::CCF,
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(1, 6, _, 6, _) => Self::HALT,
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(1, _, _, _, _) => Self::LD(
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// LD r[y], r[z]
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LDTarget::Register(Table::r(y)),
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LDTarget::Register(Table::r(z)),
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),
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(2, _, _, _, _) => Table::x2_alu(y, z), // alu[y] r[z]
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(3, 0, _, 0..=3, _) => Instruction::RET(Table::cc(y)), // RET cc[y]
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(3, 0, _, 4, _) => Instruction::LD(
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(3, 0, _, 0..=3, _) => Self::RET(Table::cc(y)), // RET cc[y]
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(3, 0, _, 4, _) => Self::LD(
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// LD (0xFF00 + n), A
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LDTarget::ByteAtAddressWithOffset(n),
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LDTarget::Register(InstrRegister::A),
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),
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(3, 0, _, 5, _) => Instruction::ADD(
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(3, 0, _, 5, _) => Self::ADD(
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// ADD SP, d
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MATHTarget::RegisterPair(RegisterPair::SP),
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MATHTarget::ImmediateByte(n),
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),
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(3, 0, _, 6, _) => Instruction::LD(
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(3, 0, _, 6, _) => Self::LD(
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// LD A, (0xFF00 + n)
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LDTarget::Register(InstrRegister::A),
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LDTarget::ByteAtAddressWithOffset(n),
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),
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(3, 0, _, 7, _) => Instruction::LDHL(n as i8), // LD HL, SP + d
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(3, 1, 0, _, _) => Instruction::POP(Table::rp2(p)), // POP rp2[p]
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(3, 1, 1, _, 0) => Instruction::RET(JumpCondition::Always), // RET
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(3, 1, 1, _, 1) => Instruction::RETI,
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(3, 1, 1, _, 2) => Instruction::JP(
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(3, 0, _, 7, _) => Self::LDHL(n as i8), // LD HL, SP + d
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(3, 1, 0, _, _) => Self::POP(Table::rp2(p)), // POP rp2[p]
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(3, 1, 1, _, 0) => Self::RET(JumpCondition::Always), // RET
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(3, 1, 1, _, 1) => Self::RETI,
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(3, 1, 1, _, 2) => Self::JP(
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// JP HL
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JumpCondition::Always,
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JPTarget::RegisterPair(RegisterPair::HL),
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),
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(3, 1, 1, _, 3) => Instruction::LD(
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(3, 1, 1, _, 3) => Self::LD(
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// LD SP, HL
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LDTarget::RegisterPair(RegisterPair::SP),
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LDTarget::RegisterPair(RegisterPair::HL),
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),
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(3, 2, _, 0..=3, _) => Instruction::JP(
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(3, 2, _, 0..=3, _) => Self::JP(
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// JP cc[y], nn
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Table::cc(y),
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JPTarget::ImmediateWord(nn),
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),
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(3, 2, _, 4, _) => Instruction::LD(
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(3, 2, _, 4, _) => Self::LD(
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// LD (0xFF00 + C) ,A
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LDTarget::Register(InstrRegister::IndirectC),
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LDTarget::Register(InstrRegister::A),
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),
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(3, 2, _, 5, _) => Instruction::LD(
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(3, 2, _, 5, _) => Self::LD(
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// LD (nn), A
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LDTarget::ByteAtAddress(nn),
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LDTarget::Register(InstrRegister::A),
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),
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(3, 2, _, 6, _) => Instruction::LD(
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(3, 2, _, 6, _) => Self::LD(
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// LD A, (0xFF00 + C)
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LDTarget::Register(InstrRegister::A),
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LDTarget::Register(InstrRegister::IndirectC),
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),
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(3, 2, _, 7, _) => Instruction::LD(
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(3, 2, _, 7, _) => Self::LD(
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// LD A, (nn)
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LDTarget::Register(InstrRegister::A),
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LDTarget::ByteAtAddress(nn),
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),
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(3, 3, _, 0, _) => Instruction::JP(
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(3, 3, _, 0, _) => Self::JP(
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// JP nn
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JumpCondition::Always,
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JPTarget::ImmediateWord(nn),
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@ -1337,15 +1348,15 @@ impl Instruction {
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// (3, 3, _, 3, _) => unreachable!(), (removed in documentation)
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// (3, 3, _, 4, _) => unreachable!(), (removed in documentation)
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// (3, 3, _, 5, _) => unreachable!(), (removed in documentation)
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(3, 3, _, 6, _) => Instruction::DI,
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(3, 3, _, 7, _) => Instruction::EI,
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(3, 4, _, 0..=3, _) => Instruction::CALL(Table::cc(y), nn), // CALL cc[y], nn
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(3, 3, _, 6, _) => Self::DI,
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(3, 3, _, 7, _) => Self::EI,
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(3, 4, _, 0..=3, _) => Self::CALL(Table::cc(y), nn), // CALL cc[y], nn
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// (3, 4, _, 4..=7, _) => unreachable!(), (removed in documentation)
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(3, 5, 0, _, _) => Instruction::PUSH(Table::rp2(p)), // PUSH rp2[p]
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(3, 5, 1, _, 0) => Instruction::CALL(JumpCondition::Always, nn), // CALL nn
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(3, 5, 0, _, _) => Self::PUSH(Table::rp2(p)), // PUSH rp2[p]
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(3, 5, 1, _, 0) => Self::CALL(JumpCondition::Always, nn), // CALL nn
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// (3, 5, 1, _, 1..=3) => unreachable!(), (removed in documentation)
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(3, 6, _, _, _) => Table::x3_alu(y, n),
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(3, 7, _, _, _) => Instruction::RST(y * 8), // RST y * 8
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(3, 7, _, _, _) => Self::RST(y * 8), // RST y * 8
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_ => panic!(
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"Unknown Opcode: {:#x?}\n x: {}, z: {}, q: {}, y: {}, p: {}",
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opcode, x, z, q, y, p
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@ -1353,8 +1364,26 @@ impl Instruction {
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}
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}
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fn from_unprefixed_byte(cpu: &Cpu, byte: u8) -> Self {
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unimplemented!()
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fn from_prefixed_byte(cpu: &Cpu) -> Self {
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let opcode = cpu.read_byte(cpu.register_pair(RegisterPair::PC) + 1);
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// https://gb-archive.github.io/salvage/decoding_gbz80_opcodes/Decoding%20Gamboy%20Z80%20Opcodes.html
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let x = (opcode >> 6) & 0b00000011;
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let y = (opcode >> 3) & 0b00000111;
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let z = opcode & 0b00000111;
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let p = y >> 1;
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let q = y & 0b00000001;
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match x {
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0 => Table::rot(y, z),
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1 => Self::BIT(y, Table::r(z)),
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2 => Self::BIT(y, Table::r(z)),
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3 => Self::BIT(y, Table::r(z)),
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_ => panic!(
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"Unknown Prefixed Opcode: 0xCB {:#x?}\n x: {}, z: {}, q: {}, y: {}, p: {}",
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opcode, x, z, q, y, p
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),
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}
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}
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}
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@ -1545,8 +1574,8 @@ impl Table {
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}
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}
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pub fn x2_alu(fn_index: u8, r_index: u8) -> Instruction {
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match fn_index {
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pub fn x2_alu(index: u8, r_index: u8) -> Instruction {
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match index {
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0 => Instruction::ADD(
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// ADD A, r[z]
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MATHTarget::Register(InstrRegister::A),
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@ -1563,8 +1592,8 @@ impl Table {
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}
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}
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pub fn x3_alu(fn_index: u8, n: u8) -> Instruction {
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match fn_index {
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pub fn x3_alu(index: u8, n: u8) -> Instruction {
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match index {
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0 => Instruction::ADD(
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// ADD A, n
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MATHTarget::Register(InstrRegister::A),
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@ -1580,4 +1609,18 @@ impl Table {
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_ => unreachable!("Index {} is out of bounds in alu[]"),
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}
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}
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pub fn rot(index: u8, r_index: u8) -> Instruction {
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match index {
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0 => Instruction::RLC(Self::r(r_index)),
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1 => Instruction::RRC(Self::r(r_index)),
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2 => Instruction::RL(Self::r(r_index)),
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3 => Instruction::RR(Self::r(r_index)),
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4 => Instruction::SLA(Self::r(r_index)),
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5 => Instruction::SRA(Self::r(r_index)),
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6 => Instruction::SWAP(Self::r(r_index)),
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7 => Instruction::SRL(Self::r(r_index)),
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_ => unreachable!("Index {} is out of bounds in rot[]"),
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}
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}
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}
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