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chore: satisfy clippy

This commit is contained in:
Rekai Nyangadzayi Musuka 2021-11-30 04:13:12 -04:00
parent 9d23b571fb
commit 4a1a21a08f
3 changed files with 133 additions and 160 deletions
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20
src/bus.rs
View File

@ -10,7 +10,7 @@ use crate::work_ram::{VariableWorkRam, WorkRam};
pub(crate) const BOOT_SIZE: usize = 0x100; pub(crate) const BOOT_SIZE: usize = 0x100;
#[derive(Debug)] #[derive(Debug, Default)]
pub struct Bus { pub struct Bus {
boot: Option<[u8; BOOT_SIZE]>, // Boot ROM is 256b long boot: Option<[u8; BOOT_SIZE]>, // Boot ROM is 256b long
pub(crate) cart: Option<Cartridge>, pub(crate) cart: Option<Cartridge>,
@ -25,24 +25,6 @@ pub struct Bus {
pub(crate) joyp: Joypad, pub(crate) joyp: Joypad,
} }
impl Default for Bus {
fn default() -> Self {
Self {
boot: None,
cart: None,
ppu: Default::default(),
work_ram: Default::default(),
var_ram: Default::default(),
timer: Default::default(),
int: Default::default(),
apu: Default::default(),
high_ram: Default::default(),
serial: Default::default(),
joyp: Default::default(),
}
}
}
impl Bus { impl Bus {
pub(crate) fn with_boot(rom: [u8; 256]) -> Self { pub(crate) fn with_boot(rom: [u8; 256]) -> Self {
Self { Self {

262
src/cartridge.rs
View File

@ -15,7 +15,7 @@ const ROM_MANUFACTURER_START: usize = 0x13F;
pub(crate) struct Cartridge { pub(crate) struct Cartridge {
mem: Vec<u8>, mem: Vec<u8>,
pub(crate) title: Option<String>, pub(crate) title: Option<String>,
mbc: Box<dyn MBCIo>, mbc: Box<dyn MbcIo>,
} }
impl Cartridge { impl Cartridge {
@ -44,7 +44,7 @@ impl Cartridge {
self.mbc.tick() self.mbc.tick()
} }
fn detect_mbc(mem: &[u8]) -> Box<dyn MBCIo> { fn detect_mbc(mem: &[u8]) -> Box<dyn MbcIo> {
let ram_size: RamSize = mem[RAM_SIZE_ADDRESS].into(); let ram_size: RamSize = mem[RAM_SIZE_ADDRESS].into();
let rom_size: RomSize = mem[ROM_SIZE_ADDRESS].into(); let rom_size: RomSize = mem[ROM_SIZE_ADDRESS].into();
let mbc_kind = Self::detect_mbc_kind(mem[MBC_KIND_ADDRESS]); let mbc_kind = Self::detect_mbc_kind(mem[MBC_KIND_ADDRESS]);
@ -56,14 +56,14 @@ impl Cartridge {
tracing::info!("MBC kind: {:?}", mbc_kind); tracing::info!("MBC kind: {:?}", mbc_kind);
match mbc_kind { match mbc_kind {
MBCKind::None => Box::new(NoMBC), MbcKind::None => Box::new(NoMbc),
MBCKind::MBC1(hw) => Box::new(MBC1::new(hw, ram_size, rom_size)), MbcKind::Mbc1(hw) => Box::new(Mbc1::new(hw, ram_size, rom_size)),
MBCKind::MBC2(hw) => Box::new(MBC2::new(hw, rom_cap)), MbcKind::Mbc2(hw) => Box::new(Mbc2::new(hw, rom_cap)),
MBCKind::MBC3(hw @ MBC3Hardware::RTC) => Box::new(MBC3::new(hw, ram_cap)), MbcKind::Mbc3(hw @ Mbc3Hardware::Rtc) => Box::new(Mbc3::new(hw, ram_cap)),
MBCKind::MBC3(hw @ MBC3Hardware::RTCAndBatteryRAM) => Box::new(MBC3::new(hw, ram_cap)), MbcKind::Mbc3(hw @ Mbc3Hardware::RtcBatteryRam) => Box::new(Mbc3::new(hw, ram_cap)),
MBCKind::MBC5(hw @ MBC5Hardware::None) => Box::new(MBC5::new(hw, ram_cap, rom_cap)), MbcKind::Mbc4(hw @ Mbc5Hardware::None) => Box::new(Mbc5::new(hw, ram_cap, rom_cap)),
MBCKind::MBC5(hw @ MBC5Hardware::BatteryRAM) => { MbcKind::Mbc4(hw @ Mbc5Hardware::BatteryRam) => {
Box::new(MBC5::new(hw, ram_cap, rom_cap)) Box::new(Mbc5::new(hw, ram_cap, rom_cap))
} }
kind => todo!("ROMS with {:?} are currently unsupported", kind), kind => todo!("ROMS with {:?} are currently unsupported", kind),
} }
@ -88,29 +88,29 @@ impl Cartridge {
} }
} }
fn detect_mbc_kind(id: u8) -> MBCKind { fn detect_mbc_kind(id: u8) -> MbcKind {
use MBCKind::*; use MbcKind::*;
match id { match id {
0x00 => None, 0x00 => None,
0x01 => MBC1(MBC1Hardware::None), 0x01 => Mbc1(Mbc1Hardware::None),
0x02 => MBC1(MBC1Hardware::RAM), 0x02 => Mbc1(Mbc1Hardware::Ram),
0x03 => MBC1(MBC1Hardware::BatteryRAM), 0x03 => Mbc1(Mbc1Hardware::BatteryRam),
0x05 => MBC2(MBC2Hardware::None), 0x05 => Mbc2(Mbc2Hardware::None),
0x06 => MBC2(MBC2Hardware::BatteryRAM), 0x06 => Mbc2(Mbc2Hardware::BatteryRam),
0x08 | 0x09 => unimplemented!("NoMBC + RAM and NoMBC + Battery unsupported"), 0x08 | 0x09 => unimplemented!("NoMBC + RAM and NoMBC + Battery unsupported"),
0x0B | 0x0C | 0x0D => unimplemented!("MM01 unsupported"), 0x0B | 0x0C | 0x0D => unimplemented!("MM01 unsupported"),
0x0F => MBC3(MBC3Hardware::RTC), 0x0F => Mbc3(Mbc3Hardware::Rtc),
0x10 => MBC3(MBC3Hardware::RTCAndBatteryRAM), 0x10 => Mbc3(Mbc3Hardware::RtcBatteryRam),
0x11 => MBC3(MBC3Hardware::None), 0x11 => Mbc3(Mbc3Hardware::None),
0x12 => MBC3(MBC3Hardware::RAM), 0x12 => Mbc3(Mbc3Hardware::Ram),
0x13 => MBC3(MBC3Hardware::BatteryRAM), 0x13 => Mbc3(Mbc3Hardware::BatteryRam),
0x19 => MBC5(MBC5Hardware::None), 0x19 => Mbc4(Mbc5Hardware::None),
0x1A => MBC5(MBC5Hardware::RAM), 0x1A => Mbc4(Mbc5Hardware::Ram),
0x1B => MBC5(MBC5Hardware::BatteryRAM), 0x1B => Mbc4(Mbc5Hardware::BatteryRam),
0x1C => MBC5(MBC5Hardware::Rumble), 0x1C => Mbc4(Mbc5Hardware::Rumble),
0x1D => MBC5(MBC5Hardware::RumbleRAM), 0x1D => Mbc4(Mbc5Hardware::RumbleRam),
0x1E => MBC5(MBC5Hardware::RumbleBatteryRAM), 0x1E => Mbc4(Mbc5Hardware::RumbleBatteryRam),
id => unimplemented!("MBC with code {:#04X} is unsupported", id), id => unimplemented!("MBC with code {:#04X} is unsupported", id),
} }
} }
@ -118,7 +118,7 @@ impl Cartridge {
impl BusIo for Cartridge { impl BusIo for Cartridge {
fn read_byte(&self, addr: u16) -> u8 { fn read_byte(&self, addr: u16) -> u8 {
use MBCResult::*; use MbcResult::*;
match self.mbc.handle_read(addr) { match self.mbc.handle_read(addr) {
Addr(addr) => self.mem[addr], Addr(addr) => self.mem[addr],
@ -132,7 +132,7 @@ impl BusIo for Cartridge {
} }
#[derive(Debug)] #[derive(Debug)]
struct MBC1 { struct Mbc1 {
/// 5-bit number /// 5-bit number
rom_bank: u8, rom_bank: u8,
/// 2-bit number /// 2-bit number
@ -143,11 +143,11 @@ struct MBC1 {
rom_size: RomSize, rom_size: RomSize,
mem_enabled: bool, mem_enabled: bool,
hw: MBC1Hardware, hw: Mbc1Hardware,
} }
impl MBC1 { impl Mbc1 {
fn new(hw: MBC1Hardware, ram_size: RamSize, rom_size: RomSize) -> Self { fn new(hw: Mbc1Hardware, ram_size: RamSize, rom_size: RomSize) -> Self {
Self { Self {
rom_bank: 0x01, rom_bank: 0x01,
mem: vec![0; ram_size.capacity() as usize], mem: vec![0; ram_size.capacity() as usize],
@ -225,25 +225,25 @@ impl MBC1 {
} }
} }
impl Savable for MBC1 { impl Savable for Mbc1 {
fn ext_ram(&self) -> Option<&[u8]> { fn ext_ram(&self) -> Option<&[u8]> {
match self.hw { match self.hw {
MBC1Hardware::BatteryRAM => Some(&self.mem), Mbc1Hardware::BatteryRam => Some(&self.mem),
_ => None, _ => None,
} }
} }
fn ext_ram_mut(&mut self) -> Option<&mut [u8]> { fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
match self.hw { match self.hw {
MBC1Hardware::BatteryRAM => Some(&mut self.mem), Mbc1Hardware::BatteryRam => Some(&mut self.mem),
_ => None, _ => None,
} }
} }
} }
impl MBCIo for MBC1 { impl MbcIo for Mbc1 {
fn handle_read(&self, addr: u16) -> MBCResult { fn handle_read(&self, addr: u16) -> MbcResult {
use MBCResult::*; use MbcResult::*;
match addr { match addr {
0x0000..=0x3FFF if self.mode => { 0x0000..=0x3FFF if self.mode => {
@ -277,7 +277,7 @@ impl MBCIo for MBC1 {
} }
} }
impl RtClockTick for MBC1 { impl RtcTick for Mbc1 {
fn tick(&mut self) {} fn tick(&mut self) {}
} }
@ -309,7 +309,7 @@ impl RtClock {
} }
} }
impl RtClockTick for RtClock { impl RtcTick for RtClock {
fn tick(&mut self) { fn tick(&mut self) {
// This is the sort of situation where you'd want to use a scheduler. // This is the sort of situation where you'd want to use a scheduler.
if self.day_high.halt() { if self.day_high.halt() {
@ -341,7 +341,7 @@ impl RtClockTick for RtClock {
} }
} }
trait RtClockTick { trait RtcTick {
fn tick(&mut self); fn tick(&mut self);
} }
@ -379,41 +379,41 @@ impl From<DayHigh> for u8 {
} }
#[derive(Debug, Clone, Copy)] #[derive(Debug, Clone, Copy)]
enum MBC3Device { enum Mbc3Device {
ExternalRam, Ram,
Clock(RtcRegister), Rtc(RtcRegister),
} }
#[derive(Debug, Clone, Copy)] #[derive(Debug, Clone, Copy)]
enum RtcRegister { enum RtcRegister {
Second, Sec,
Minute, Min,
Hour, Hr,
DayLow, DayLow,
DayHigh, DayHigh,
} }
#[derive(Debug)] #[derive(Debug)]
struct MBC3 { struct Mbc3 {
/// 7-bit Number /// 7-bit Number
rom_bank: u8, rom_bank: u8,
/// 2-bit Number /// 2-bit Number
ram_bank: u8, ram_bank: u8,
devs_enabled: bool, devs_enabled: bool,
mapped: Option<MBC3Device>, mapped: Option<Mbc3Device>,
mem: Vec<u8>, mem: Vec<u8>,
// RTC Data Latch Previous Write // RTC Data Latch Previous Write
prev_latch_write: Option<u8>, prev_latch_write: Option<u8>,
hw: MBC3Hardware, hw: Mbc3Hardware,
rtc: RtClock, rtc: RtClock,
rtc_latch: Option<RtClock>, rtc_latch: Option<RtClock>,
} }
impl MBC3 { impl Mbc3 {
fn new(hw: MBC3Hardware, ram_cap: usize) -> Self { fn new(hw: Mbc3Hardware, ram_cap: usize) -> Self {
Self { Self {
mem: vec![0; ram_cap], mem: vec![0; ram_cap],
rom_bank: Default::default(), rom_bank: Default::default(),
@ -428,41 +428,41 @@ impl MBC3 {
} }
} }
impl Savable for MBC3 { impl Savable for Mbc3 {
fn ext_ram(&self) -> Option<&[u8]> { fn ext_ram(&self) -> Option<&[u8]> {
match self.hw { match self.hw {
MBC3Hardware::BatteryRAM | MBC3Hardware::RTCAndBatteryRAM => Some(&self.mem), Mbc3Hardware::BatteryRam | Mbc3Hardware::RtcBatteryRam => Some(&self.mem),
_ => None, _ => None,
} }
} }
fn ext_ram_mut(&mut self) -> Option<&mut [u8]> { fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
match self.hw { match self.hw {
MBC3Hardware::BatteryRAM | MBC3Hardware::RTCAndBatteryRAM => Some(&mut self.mem), Mbc3Hardware::BatteryRam | Mbc3Hardware::RtcBatteryRam => Some(&mut self.mem),
_ => None, _ => None,
} }
} }
} }
impl MBCIo for MBC3 { impl MbcIo for Mbc3 {
fn handle_read(&self, addr: u16) -> MBCResult { fn handle_read(&self, addr: u16) -> MbcResult {
use MBCResult::*; use MbcResult::*;
use RtcRegister::*; use RtcRegister::*;
let res = match addr { let res = match addr {
0x0000..=0x3FFF => Addr(addr as usize), 0x0000..=0x3FFF => Addr(addr as usize),
0x4000..=0x7FFF => Addr(0x4000 * self.rom_bank as usize + (addr as usize - 0x4000)), 0x4000..=0x7FFF => Addr(0x4000 * self.rom_bank as usize + (addr as usize - 0x4000)),
0xA000..=0xBFFF => match self.mapped { 0xA000..=0xBFFF => match self.mapped {
Some(MBC3Device::ExternalRam) if self.devs_enabled => { Some(Mbc3Device::Ram) if self.devs_enabled => {
Byte(self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)]) Byte(self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)])
} }
Some(MBC3Device::Clock(reg)) if self.devs_enabled => Byte( Some(Mbc3Device::Rtc(reg)) if self.devs_enabled => Byte(
self.rtc_latch self.rtc_latch
.as_ref() .as_ref()
.map(|rtc| match reg { .map(|rtc| match reg {
Second => rtc.sec, Sec => rtc.sec,
Minute => rtc.min, Min => rtc.min,
Hour => rtc.hr, Hr => rtc.hr,
DayLow => rtc.day_low, DayLow => rtc.day_low,
DayHigh => rtc.day_high.into(), DayHigh => rtc.day_high.into(),
}) })
@ -490,13 +490,13 @@ impl MBCIo for MBC3 {
0x4000..=0x5FFF => match byte { 0x4000..=0x5FFF => match byte {
0x00 | 0x01 | 0x02 | 0x03 => { 0x00 | 0x01 | 0x02 | 0x03 => {
self.ram_bank = byte & 0x03; self.ram_bank = byte & 0x03;
self.mapped = Some(MBC3Device::ExternalRam); self.mapped = Some(Mbc3Device::Ram);
} }
0x08 => self.mapped = Some(MBC3Device::Clock(Second)), 0x08 => self.mapped = Some(Mbc3Device::Rtc(Sec)),
0x09 => self.mapped = Some(MBC3Device::Clock(Minute)), 0x09 => self.mapped = Some(Mbc3Device::Rtc(Min)),
0x0A => self.mapped = Some(MBC3Device::Clock(Hour)), 0x0A => self.mapped = Some(Mbc3Device::Rtc(Hr)),
0x0B => self.mapped = Some(MBC3Device::Clock(DayLow)), 0x0B => self.mapped = Some(Mbc3Device::Rtc(DayLow)),
0x0C => self.mapped = Some(MBC3Device::Clock(DayHigh)), 0x0C => self.mapped = Some(Mbc3Device::Rtc(DayHigh)),
_ => {} _ => {}
}, },
@ -509,17 +509,17 @@ impl MBCIo for MBC3 {
self.prev_latch_write = Some(byte); self.prev_latch_write = Some(byte);
} }
0xA000..=0xBFFF => match self.mapped { 0xA000..=0xBFFF => match self.mapped {
Some(MBC3Device::ExternalRam) if self.devs_enabled => { Some(Mbc3Device::Ram) if self.devs_enabled => {
self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)] = byte self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)] = byte
} }
Some(MBC3Device::Clock(rtc_reg)) if self.devs_enabled => match rtc_reg { Some(Mbc3Device::Rtc(rtc_reg)) if self.devs_enabled => match rtc_reg {
Second => { Sec => {
self.rtc.sec = byte & 0x3F; self.rtc.sec = byte & 0x3F;
// Writing to RTC S resets the internal sub-second counter // Writing to RTC S resets the internal sub-second counter
self.rtc.cycles = 0; self.rtc.cycles = 0;
} }
Minute => self.rtc.min = byte & 0x3F, Min => self.rtc.min = byte & 0x3F,
Hour => self.rtc.hr = byte & 0x1F, Hr => self.rtc.hr = byte & 0x1F,
DayLow => self.rtc.day_low = byte, DayLow => self.rtc.day_low = byte,
DayHigh => self.rtc.day_high = (byte & 0xC1).into(), DayHigh => self.rtc.day_high = (byte & 0xC1).into(),
}, },
@ -530,16 +530,16 @@ impl MBCIo for MBC3 {
} }
} }
impl RtClockTick for MBC3 { impl RtcTick for Mbc3 {
fn tick(&mut self) { fn tick(&mut self) {
if let MBC3Hardware::RTCAndBatteryRAM | MBC3Hardware::RTC = self.hw { if let Mbc3Hardware::RtcBatteryRam | Mbc3Hardware::Rtc = self.hw {
self.rtc.tick(); self.rtc.tick();
} }
} }
} }
#[derive(Debug)] #[derive(Debug)]
struct MBC5 { struct Mbc5 {
/// 9-bit number /// 9-bit number
rom_bank: u16, rom_bank: u16,
/// 4-bit number /// 4-bit number
@ -549,11 +549,11 @@ struct MBC5 {
mem: Vec<u8>, mem: Vec<u8>,
mem_enabled: bool, mem_enabled: bool,
hw: MBC5Hardware, hw: Mbc5Hardware,
} }
impl MBC5 { impl Mbc5 {
fn new(hw: MBC5Hardware, ram_cap: usize, rom_cap: usize) -> Self { fn new(hw: Mbc5Hardware, ram_cap: usize, rom_cap: usize) -> Self {
Self { Self {
rom_bank: 0x01, rom_bank: 0x01,
mem: vec![0; ram_cap], mem: vec![0; ram_cap],
@ -569,25 +569,25 @@ impl MBC5 {
} }
} }
impl Savable for MBC5 { impl Savable for Mbc5 {
fn ext_ram(&self) -> Option<&[u8]> { fn ext_ram(&self) -> Option<&[u8]> {
match self.hw { match self.hw {
MBC5Hardware::RumbleBatteryRAM | MBC5Hardware::BatteryRAM => Some(&self.mem), Mbc5Hardware::RumbleBatteryRam | Mbc5Hardware::BatteryRam => Some(&self.mem),
_ => None, _ => None,
} }
} }
fn ext_ram_mut(&mut self) -> Option<&mut [u8]> { fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
match self.hw { match self.hw {
MBC5Hardware::RumbleBatteryRAM | MBC5Hardware::BatteryRAM => Some(&mut self.mem), Mbc5Hardware::RumbleBatteryRam | Mbc5Hardware::BatteryRam => Some(&mut self.mem),
_ => None, _ => None,
} }
} }
} }
impl MBCIo for MBC5 { impl MbcIo for Mbc5 {
fn handle_read(&self, addr: u16) -> MBCResult { fn handle_read(&self, addr: u16) -> MbcResult {
use MBCResult::*; use MbcResult::*;
match addr { match addr {
0x0000..=0x3FFF => Addr(addr as usize), 0x0000..=0x3FFF => Addr(addr as usize),
@ -615,25 +615,25 @@ impl MBCIo for MBC5 {
} }
} }
impl RtClockTick for MBC5 { impl RtcTick for Mbc5 {
fn tick(&mut self) {} fn tick(&mut self) {}
} }
#[derive(Debug)] #[derive(Debug)]
struct MBC2 { struct Mbc2 {
/// 4-bit number /// 4-bit number
rom_bank: u8, rom_bank: u8,
mem: Box<[u8; Self::RAM_SIZE]>, mem: Box<[u8; Self::RAM_SIZE]>,
mem_enabled: bool, mem_enabled: bool,
rom_cap: usize, rom_cap: usize,
hw: MBC2Hardware, hw: Mbc2Hardware,
} }
impl MBC2 { impl Mbc2 {
const RAM_SIZE: usize = 0x0200; const RAM_SIZE: usize = 0x0200;
fn new(hw: MBC2Hardware, rom_cap: usize) -> Self { fn new(hw: Mbc2Hardware, rom_cap: usize) -> Self {
Self { Self {
rom_bank: 0x01, rom_bank: 0x01,
mem: Box::new([0; Self::RAM_SIZE]), mem: Box::new([0; Self::RAM_SIZE]),
@ -648,25 +648,25 @@ impl MBC2 {
} }
} }
impl Savable for MBC2 { impl Savable for Mbc2 {
fn ext_ram(&self) -> Option<&[u8]> { fn ext_ram(&self) -> Option<&[u8]> {
match self.hw { match self.hw {
MBC2Hardware::BatteryRAM => Some(self.mem.as_ref()), Mbc2Hardware::BatteryRam => Some(self.mem.as_ref()),
MBC2Hardware::None => None, Mbc2Hardware::None => None,
} }
} }
fn ext_ram_mut(&mut self) -> Option<&mut [u8]> { fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
match self.hw { match self.hw {
MBC2Hardware::BatteryRAM => Some(self.mem.as_mut()), Mbc2Hardware::BatteryRam => Some(self.mem.as_mut()),
MBC2Hardware::None => None, Mbc2Hardware::None => None,
} }
} }
} }
impl MBCIo for MBC2 { impl MbcIo for Mbc2 {
fn handle_read(&self, addr: u16) -> MBCResult { fn handle_read(&self, addr: u16) -> MbcResult {
use MBCResult::*; use MbcResult::*;
match addr { match addr {
0x0000..=0x3FFF => Addr(addr as usize), 0x0000..=0x3FFF => Addr(addr as usize),
@ -698,14 +698,14 @@ impl MBCIo for MBC2 {
} }
} }
impl RtClockTick for MBC2 { impl RtcTick for Mbc2 {
fn tick(&mut self) {} fn tick(&mut self) {}
} }
#[derive(Debug)] #[derive(Debug)]
struct NoMBC; struct NoMbc;
impl Savable for NoMBC { impl Savable for NoMbc {
fn ext_ram(&self) -> Option<&[u8]> { fn ext_ram(&self) -> Option<&[u8]> {
None None
} }
@ -715,9 +715,9 @@ impl Savable for NoMBC {
} }
} }
impl MBCIo for NoMBC { impl MbcIo for NoMbc {
fn handle_read(&self, addr: u16) -> MBCResult { fn handle_read(&self, addr: u16) -> MbcResult {
MBCResult::Addr(addr as usize) MbcResult::Addr(addr as usize)
} }
fn handle_write(&mut self, _: u16, byte: u8) { fn handle_write(&mut self, _: u16, byte: u8) {
@ -725,60 +725,60 @@ impl MBCIo for NoMBC {
} }
} }
impl RtClockTick for NoMBC { impl RtcTick for NoMbc {
fn tick(&mut self) {} fn tick(&mut self) {}
} }
trait MBCIo: Savable + RtClockTick { trait MbcIo: Savable + RtcTick {
fn handle_read(&self, addr: u16) -> MBCResult; fn handle_read(&self, addr: u16) -> MbcResult;
fn handle_write(&mut self, addr: u16, byte: u8); fn handle_write(&mut self, addr: u16, byte: u8);
} }
#[derive(Debug, Clone, Copy)] #[derive(Debug, Clone, Copy)]
enum MBCResult { enum MbcResult {
Addr(usize), Addr(usize),
Byte(u8), Byte(u8),
} }
#[derive(Debug, Clone, Copy)] #[derive(Debug, Clone, Copy)]
enum MBCKind { enum MbcKind {
None, None,
MBC1(MBC1Hardware), Mbc1(Mbc1Hardware),
MBC2(MBC2Hardware), Mbc2(Mbc2Hardware),
MBC3(MBC3Hardware), Mbc3(Mbc3Hardware),
MBC5(MBC5Hardware), Mbc4(Mbc5Hardware),
} }
#[derive(Debug, Clone, Copy)] #[derive(Debug, Clone, Copy)]
enum MBC1Hardware { enum Mbc1Hardware {
None, None,
RAM, Ram,
BatteryRAM, BatteryRam,
} }
#[derive(Debug, Clone, Copy)] #[derive(Debug, Clone, Copy)]
enum MBC2Hardware { enum Mbc2Hardware {
None, None,
BatteryRAM, BatteryRam,
} }
#[derive(Debug, Clone, Copy)] #[derive(Debug, Clone, Copy)]
enum MBC3Hardware { enum Mbc3Hardware {
RTC, Rtc,
RTCAndBatteryRAM, RtcBatteryRam,
None, None,
RAM, Ram,
BatteryRAM, BatteryRam,
} }
#[derive(Debug, Clone, Copy)] #[derive(Debug, Clone, Copy)]
enum MBC5Hardware { enum Mbc5Hardware {
None, None,
RAM, Ram,
BatteryRAM, BatteryRam,
Rumble, Rumble,
RumbleRAM, RumbleRam,
RumbleBatteryRAM, RumbleBatteryRam,
} }
#[derive(Debug, Clone, Copy, PartialEq)] #[derive(Debug, Clone, Copy, PartialEq)]
@ -874,7 +874,7 @@ impl From<u8> for RomSize {
} }
} }
impl std::fmt::Debug for Box<dyn MBCIo> { impl std::fmt::Debug for Box<dyn MbcIo> {
fn fmt(&self, _f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { fn fmt(&self, _f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
todo!("Implement Debug for Box<dyn MBC> Trait Object"); todo!("Implement Debug for Box<dyn MBC> Trait Object");
} }

11
src/ppu.rs
View File

@ -797,21 +797,12 @@ impl Default for BackgroundFetcher {
} }
} }
#[derive(Debug)] #[derive(Debug, Default)]
struct ObjectFetcher { struct ObjectFetcher {
state: FetcherState, state: FetcherState,
tile: TileBuilder, tile: TileBuilder,
} }
impl Default for ObjectFetcher {
fn default() -> Self {
Self {
state: Default::default(),
tile: Default::default(),
}
}
}
impl Fetcher for ObjectFetcher { impl Fetcher for ObjectFetcher {
fn reset(&mut self) { fn reset(&mut self) {
self.state = Default::default(); self.state = Default::default();