chore: satisfy clippy
This commit is contained in:
parent
9d23b571fb
commit
4a1a21a08f
20
src/bus.rs
20
src/bus.rs
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@ -10,7 +10,7 @@ use crate::work_ram::{VariableWorkRam, WorkRam};
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pub(crate) const BOOT_SIZE: usize = 0x100;
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#[derive(Debug)]
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#[derive(Debug, Default)]
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pub struct Bus {
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boot: Option<[u8; BOOT_SIZE]>, // Boot ROM is 256b long
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pub(crate) cart: Option<Cartridge>,
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@ -25,24 +25,6 @@ pub struct Bus {
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pub(crate) joyp: Joypad,
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}
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impl Default for Bus {
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fn default() -> Self {
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Self {
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boot: None,
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cart: None,
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ppu: Default::default(),
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work_ram: Default::default(),
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var_ram: Default::default(),
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timer: Default::default(),
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int: Default::default(),
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apu: Default::default(),
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high_ram: Default::default(),
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serial: Default::default(),
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joyp: Default::default(),
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}
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}
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}
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impl Bus {
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pub(crate) fn with_boot(rom: [u8; 256]) -> Self {
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Self {
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262
src/cartridge.rs
262
src/cartridge.rs
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@ -15,7 +15,7 @@ const ROM_MANUFACTURER_START: usize = 0x13F;
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pub(crate) struct Cartridge {
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mem: Vec<u8>,
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pub(crate) title: Option<String>,
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mbc: Box<dyn MBCIo>,
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mbc: Box<dyn MbcIo>,
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}
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impl Cartridge {
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@ -44,7 +44,7 @@ impl Cartridge {
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self.mbc.tick()
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}
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fn detect_mbc(mem: &[u8]) -> Box<dyn MBCIo> {
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fn detect_mbc(mem: &[u8]) -> Box<dyn MbcIo> {
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let ram_size: RamSize = mem[RAM_SIZE_ADDRESS].into();
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let rom_size: RomSize = mem[ROM_SIZE_ADDRESS].into();
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let mbc_kind = Self::detect_mbc_kind(mem[MBC_KIND_ADDRESS]);
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@ -56,14 +56,14 @@ impl Cartridge {
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tracing::info!("MBC kind: {:?}", mbc_kind);
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match mbc_kind {
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MBCKind::None => Box::new(NoMBC),
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MBCKind::MBC1(hw) => Box::new(MBC1::new(hw, ram_size, rom_size)),
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MBCKind::MBC2(hw) => Box::new(MBC2::new(hw, rom_cap)),
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MBCKind::MBC3(hw @ MBC3Hardware::RTC) => Box::new(MBC3::new(hw, ram_cap)),
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MBCKind::MBC3(hw @ MBC3Hardware::RTCAndBatteryRAM) => Box::new(MBC3::new(hw, ram_cap)),
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MBCKind::MBC5(hw @ MBC5Hardware::None) => Box::new(MBC5::new(hw, ram_cap, rom_cap)),
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MBCKind::MBC5(hw @ MBC5Hardware::BatteryRAM) => {
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Box::new(MBC5::new(hw, ram_cap, rom_cap))
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MbcKind::None => Box::new(NoMbc),
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MbcKind::Mbc1(hw) => Box::new(Mbc1::new(hw, ram_size, rom_size)),
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MbcKind::Mbc2(hw) => Box::new(Mbc2::new(hw, rom_cap)),
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MbcKind::Mbc3(hw @ Mbc3Hardware::Rtc) => Box::new(Mbc3::new(hw, ram_cap)),
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MbcKind::Mbc3(hw @ Mbc3Hardware::RtcBatteryRam) => Box::new(Mbc3::new(hw, ram_cap)),
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MbcKind::Mbc4(hw @ Mbc5Hardware::None) => Box::new(Mbc5::new(hw, ram_cap, rom_cap)),
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MbcKind::Mbc4(hw @ Mbc5Hardware::BatteryRam) => {
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Box::new(Mbc5::new(hw, ram_cap, rom_cap))
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}
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kind => todo!("ROMS with {:?} are currently unsupported", kind),
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}
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@ -88,29 +88,29 @@ impl Cartridge {
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}
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}
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fn detect_mbc_kind(id: u8) -> MBCKind {
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use MBCKind::*;
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fn detect_mbc_kind(id: u8) -> MbcKind {
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use MbcKind::*;
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match id {
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0x00 => None,
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0x01 => MBC1(MBC1Hardware::None),
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0x02 => MBC1(MBC1Hardware::RAM),
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0x03 => MBC1(MBC1Hardware::BatteryRAM),
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0x05 => MBC2(MBC2Hardware::None),
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0x06 => MBC2(MBC2Hardware::BatteryRAM),
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0x01 => Mbc1(Mbc1Hardware::None),
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0x02 => Mbc1(Mbc1Hardware::Ram),
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0x03 => Mbc1(Mbc1Hardware::BatteryRam),
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0x05 => Mbc2(Mbc2Hardware::None),
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0x06 => Mbc2(Mbc2Hardware::BatteryRam),
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0x08 | 0x09 => unimplemented!("NoMBC + RAM and NoMBC + Battery unsupported"),
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0x0B | 0x0C | 0x0D => unimplemented!("MM01 unsupported"),
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0x0F => MBC3(MBC3Hardware::RTC),
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0x10 => MBC3(MBC3Hardware::RTCAndBatteryRAM),
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0x11 => MBC3(MBC3Hardware::None),
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0x12 => MBC3(MBC3Hardware::RAM),
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0x13 => MBC3(MBC3Hardware::BatteryRAM),
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0x19 => MBC5(MBC5Hardware::None),
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0x1A => MBC5(MBC5Hardware::RAM),
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0x1B => MBC5(MBC5Hardware::BatteryRAM),
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0x1C => MBC5(MBC5Hardware::Rumble),
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0x1D => MBC5(MBC5Hardware::RumbleRAM),
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0x1E => MBC5(MBC5Hardware::RumbleBatteryRAM),
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0x0F => Mbc3(Mbc3Hardware::Rtc),
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0x10 => Mbc3(Mbc3Hardware::RtcBatteryRam),
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0x11 => Mbc3(Mbc3Hardware::None),
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0x12 => Mbc3(Mbc3Hardware::Ram),
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0x13 => Mbc3(Mbc3Hardware::BatteryRam),
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0x19 => Mbc4(Mbc5Hardware::None),
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0x1A => Mbc4(Mbc5Hardware::Ram),
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0x1B => Mbc4(Mbc5Hardware::BatteryRam),
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0x1C => Mbc4(Mbc5Hardware::Rumble),
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0x1D => Mbc4(Mbc5Hardware::RumbleRam),
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0x1E => Mbc4(Mbc5Hardware::RumbleBatteryRam),
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id => unimplemented!("MBC with code {:#04X} is unsupported", id),
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}
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}
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@ -118,7 +118,7 @@ impl Cartridge {
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impl BusIo for Cartridge {
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fn read_byte(&self, addr: u16) -> u8 {
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use MBCResult::*;
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use MbcResult::*;
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match self.mbc.handle_read(addr) {
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Addr(addr) => self.mem[addr],
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@ -132,7 +132,7 @@ impl BusIo for Cartridge {
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}
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#[derive(Debug)]
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struct MBC1 {
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struct Mbc1 {
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/// 5-bit number
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rom_bank: u8,
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/// 2-bit number
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@ -143,11 +143,11 @@ struct MBC1 {
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rom_size: RomSize,
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mem_enabled: bool,
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hw: MBC1Hardware,
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hw: Mbc1Hardware,
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}
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impl MBC1 {
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fn new(hw: MBC1Hardware, ram_size: RamSize, rom_size: RomSize) -> Self {
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impl Mbc1 {
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fn new(hw: Mbc1Hardware, ram_size: RamSize, rom_size: RomSize) -> Self {
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Self {
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rom_bank: 0x01,
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mem: vec![0; ram_size.capacity() as usize],
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@ -225,25 +225,25 @@ impl MBC1 {
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}
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}
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impl Savable for MBC1 {
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impl Savable for Mbc1 {
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fn ext_ram(&self) -> Option<&[u8]> {
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match self.hw {
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MBC1Hardware::BatteryRAM => Some(&self.mem),
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Mbc1Hardware::BatteryRam => Some(&self.mem),
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_ => None,
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}
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}
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fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
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match self.hw {
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MBC1Hardware::BatteryRAM => Some(&mut self.mem),
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Mbc1Hardware::BatteryRam => Some(&mut self.mem),
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_ => None,
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}
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}
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}
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impl MBCIo for MBC1 {
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fn handle_read(&self, addr: u16) -> MBCResult {
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use MBCResult::*;
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impl MbcIo for Mbc1 {
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fn handle_read(&self, addr: u16) -> MbcResult {
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use MbcResult::*;
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match addr {
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0x0000..=0x3FFF if self.mode => {
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@ -277,7 +277,7 @@ impl MBCIo for MBC1 {
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}
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}
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impl RtClockTick for MBC1 {
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impl RtcTick for Mbc1 {
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fn tick(&mut self) {}
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}
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@ -309,7 +309,7 @@ impl RtClock {
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}
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}
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impl RtClockTick for RtClock {
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impl RtcTick for RtClock {
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fn tick(&mut self) {
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// This is the sort of situation where you'd want to use a scheduler.
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if self.day_high.halt() {
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@ -341,7 +341,7 @@ impl RtClockTick for RtClock {
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}
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}
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trait RtClockTick {
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trait RtcTick {
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fn tick(&mut self);
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}
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@ -379,41 +379,41 @@ impl From<DayHigh> for u8 {
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}
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#[derive(Debug, Clone, Copy)]
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enum MBC3Device {
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ExternalRam,
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Clock(RtcRegister),
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enum Mbc3Device {
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Ram,
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Rtc(RtcRegister),
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}
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#[derive(Debug, Clone, Copy)]
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enum RtcRegister {
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Second,
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Minute,
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Hour,
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Sec,
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Min,
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Hr,
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DayLow,
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DayHigh,
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}
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#[derive(Debug)]
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struct MBC3 {
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struct Mbc3 {
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/// 7-bit Number
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rom_bank: u8,
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/// 2-bit Number
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ram_bank: u8,
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devs_enabled: bool,
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mapped: Option<MBC3Device>,
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mapped: Option<Mbc3Device>,
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mem: Vec<u8>,
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// RTC Data Latch Previous Write
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prev_latch_write: Option<u8>,
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hw: MBC3Hardware,
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hw: Mbc3Hardware,
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rtc: RtClock,
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rtc_latch: Option<RtClock>,
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}
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impl MBC3 {
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fn new(hw: MBC3Hardware, ram_cap: usize) -> Self {
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impl Mbc3 {
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fn new(hw: Mbc3Hardware, ram_cap: usize) -> Self {
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Self {
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mem: vec![0; ram_cap],
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rom_bank: Default::default(),
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@ -428,41 +428,41 @@ impl MBC3 {
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}
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}
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impl Savable for MBC3 {
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impl Savable for Mbc3 {
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fn ext_ram(&self) -> Option<&[u8]> {
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match self.hw {
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MBC3Hardware::BatteryRAM | MBC3Hardware::RTCAndBatteryRAM => Some(&self.mem),
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Mbc3Hardware::BatteryRam | Mbc3Hardware::RtcBatteryRam => Some(&self.mem),
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_ => None,
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}
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}
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fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
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match self.hw {
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MBC3Hardware::BatteryRAM | MBC3Hardware::RTCAndBatteryRAM => Some(&mut self.mem),
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Mbc3Hardware::BatteryRam | Mbc3Hardware::RtcBatteryRam => Some(&mut self.mem),
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_ => None,
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}
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}
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}
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impl MBCIo for MBC3 {
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fn handle_read(&self, addr: u16) -> MBCResult {
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use MBCResult::*;
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impl MbcIo for Mbc3 {
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fn handle_read(&self, addr: u16) -> MbcResult {
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use MbcResult::*;
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use RtcRegister::*;
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let res = match addr {
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0x0000..=0x3FFF => Addr(addr as usize),
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0x4000..=0x7FFF => Addr(0x4000 * self.rom_bank as usize + (addr as usize - 0x4000)),
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0xA000..=0xBFFF => match self.mapped {
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Some(MBC3Device::ExternalRam) if self.devs_enabled => {
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Some(Mbc3Device::Ram) if self.devs_enabled => {
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Byte(self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)])
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}
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Some(MBC3Device::Clock(reg)) if self.devs_enabled => Byte(
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Some(Mbc3Device::Rtc(reg)) if self.devs_enabled => Byte(
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self.rtc_latch
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.as_ref()
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.map(|rtc| match reg {
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Second => rtc.sec,
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Minute => rtc.min,
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Hour => rtc.hr,
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Sec => rtc.sec,
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Min => rtc.min,
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Hr => rtc.hr,
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DayLow => rtc.day_low,
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DayHigh => rtc.day_high.into(),
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})
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@ -490,13 +490,13 @@ impl MBCIo for MBC3 {
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0x4000..=0x5FFF => match byte {
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0x00 | 0x01 | 0x02 | 0x03 => {
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self.ram_bank = byte & 0x03;
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self.mapped = Some(MBC3Device::ExternalRam);
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self.mapped = Some(Mbc3Device::Ram);
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}
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0x08 => self.mapped = Some(MBC3Device::Clock(Second)),
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0x09 => self.mapped = Some(MBC3Device::Clock(Minute)),
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0x0A => self.mapped = Some(MBC3Device::Clock(Hour)),
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0x0B => self.mapped = Some(MBC3Device::Clock(DayLow)),
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0x0C => self.mapped = Some(MBC3Device::Clock(DayHigh)),
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0x08 => self.mapped = Some(Mbc3Device::Rtc(Sec)),
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0x09 => self.mapped = Some(Mbc3Device::Rtc(Min)),
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0x0A => self.mapped = Some(Mbc3Device::Rtc(Hr)),
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0x0B => self.mapped = Some(Mbc3Device::Rtc(DayLow)),
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0x0C => self.mapped = Some(Mbc3Device::Rtc(DayHigh)),
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_ => {}
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},
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@ -509,17 +509,17 @@ impl MBCIo for MBC3 {
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self.prev_latch_write = Some(byte);
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}
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0xA000..=0xBFFF => match self.mapped {
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Some(MBC3Device::ExternalRam) if self.devs_enabled => {
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Some(Mbc3Device::Ram) if self.devs_enabled => {
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self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)] = byte
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}
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Some(MBC3Device::Clock(rtc_reg)) if self.devs_enabled => match rtc_reg {
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Second => {
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Some(Mbc3Device::Rtc(rtc_reg)) if self.devs_enabled => match rtc_reg {
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Sec => {
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self.rtc.sec = byte & 0x3F;
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// Writing to RTC S resets the internal sub-second counter
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self.rtc.cycles = 0;
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}
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Minute => self.rtc.min = byte & 0x3F,
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Hour => self.rtc.hr = byte & 0x1F,
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Min => self.rtc.min = byte & 0x3F,
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Hr => self.rtc.hr = byte & 0x1F,
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DayLow => self.rtc.day_low = byte,
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DayHigh => self.rtc.day_high = (byte & 0xC1).into(),
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},
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@ -530,16 +530,16 @@ impl MBCIo for MBC3 {
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}
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}
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impl RtClockTick for MBC3 {
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impl RtcTick for Mbc3 {
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fn tick(&mut self) {
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if let MBC3Hardware::RTCAndBatteryRAM | MBC3Hardware::RTC = self.hw {
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if let Mbc3Hardware::RtcBatteryRam | Mbc3Hardware::Rtc = self.hw {
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self.rtc.tick();
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}
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}
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}
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#[derive(Debug)]
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struct MBC5 {
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struct Mbc5 {
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/// 9-bit number
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rom_bank: u16,
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/// 4-bit number
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@ -549,11 +549,11 @@ struct MBC5 {
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mem: Vec<u8>,
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mem_enabled: bool,
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hw: MBC5Hardware,
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hw: Mbc5Hardware,
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}
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impl MBC5 {
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fn new(hw: MBC5Hardware, ram_cap: usize, rom_cap: usize) -> Self {
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impl Mbc5 {
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fn new(hw: Mbc5Hardware, ram_cap: usize, rom_cap: usize) -> Self {
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Self {
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rom_bank: 0x01,
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mem: vec![0; ram_cap],
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@ -569,25 +569,25 @@ impl MBC5 {
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}
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}
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impl Savable for MBC5 {
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impl Savable for Mbc5 {
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fn ext_ram(&self) -> Option<&[u8]> {
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match self.hw {
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MBC5Hardware::RumbleBatteryRAM | MBC5Hardware::BatteryRAM => Some(&self.mem),
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Mbc5Hardware::RumbleBatteryRam | Mbc5Hardware::BatteryRam => Some(&self.mem),
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_ => None,
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}
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}
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fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
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match self.hw {
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MBC5Hardware::RumbleBatteryRAM | MBC5Hardware::BatteryRAM => Some(&mut self.mem),
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Mbc5Hardware::RumbleBatteryRam | Mbc5Hardware::BatteryRam => Some(&mut self.mem),
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_ => None,
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}
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}
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}
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impl MBCIo for MBC5 {
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fn handle_read(&self, addr: u16) -> MBCResult {
|
||||
use MBCResult::*;
|
||||
impl MbcIo for Mbc5 {
|
||||
fn handle_read(&self, addr: u16) -> MbcResult {
|
||||
use MbcResult::*;
|
||||
|
||||
match addr {
|
||||
0x0000..=0x3FFF => Addr(addr as usize),
|
||||
|
@ -615,25 +615,25 @@ impl MBCIo for MBC5 {
|
|||
}
|
||||
}
|
||||
|
||||
impl RtClockTick for MBC5 {
|
||||
impl RtcTick for Mbc5 {
|
||||
fn tick(&mut self) {}
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
struct MBC2 {
|
||||
struct Mbc2 {
|
||||
/// 4-bit number
|
||||
rom_bank: u8,
|
||||
mem: Box<[u8; Self::RAM_SIZE]>,
|
||||
|
||||
mem_enabled: bool,
|
||||
rom_cap: usize,
|
||||
hw: MBC2Hardware,
|
||||
hw: Mbc2Hardware,
|
||||
}
|
||||
|
||||
impl MBC2 {
|
||||
impl Mbc2 {
|
||||
const RAM_SIZE: usize = 0x0200;
|
||||
|
||||
fn new(hw: MBC2Hardware, rom_cap: usize) -> Self {
|
||||
fn new(hw: Mbc2Hardware, rom_cap: usize) -> Self {
|
||||
Self {
|
||||
rom_bank: 0x01,
|
||||
mem: Box::new([0; Self::RAM_SIZE]),
|
||||
|
@ -648,25 +648,25 @@ impl MBC2 {
|
|||
}
|
||||
}
|
||||
|
||||
impl Savable for MBC2 {
|
||||
impl Savable for Mbc2 {
|
||||
fn ext_ram(&self) -> Option<&[u8]> {
|
||||
match self.hw {
|
||||
MBC2Hardware::BatteryRAM => Some(self.mem.as_ref()),
|
||||
MBC2Hardware::None => None,
|
||||
Mbc2Hardware::BatteryRam => Some(self.mem.as_ref()),
|
||||
Mbc2Hardware::None => None,
|
||||
}
|
||||
}
|
||||
|
||||
fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
|
||||
match self.hw {
|
||||
MBC2Hardware::BatteryRAM => Some(self.mem.as_mut()),
|
||||
MBC2Hardware::None => None,
|
||||
Mbc2Hardware::BatteryRam => Some(self.mem.as_mut()),
|
||||
Mbc2Hardware::None => None,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl MBCIo for MBC2 {
|
||||
fn handle_read(&self, addr: u16) -> MBCResult {
|
||||
use MBCResult::*;
|
||||
impl MbcIo for Mbc2 {
|
||||
fn handle_read(&self, addr: u16) -> MbcResult {
|
||||
use MbcResult::*;
|
||||
|
||||
match addr {
|
||||
0x0000..=0x3FFF => Addr(addr as usize),
|
||||
|
@ -698,14 +698,14 @@ impl MBCIo for MBC2 {
|
|||
}
|
||||
}
|
||||
|
||||
impl RtClockTick for MBC2 {
|
||||
impl RtcTick for Mbc2 {
|
||||
fn tick(&mut self) {}
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
struct NoMBC;
|
||||
struct NoMbc;
|
||||
|
||||
impl Savable for NoMBC {
|
||||
impl Savable for NoMbc {
|
||||
fn ext_ram(&self) -> Option<&[u8]> {
|
||||
None
|
||||
}
|
||||
|
@ -715,9 +715,9 @@ impl Savable for NoMBC {
|
|||
}
|
||||
}
|
||||
|
||||
impl MBCIo for NoMBC {
|
||||
fn handle_read(&self, addr: u16) -> MBCResult {
|
||||
MBCResult::Addr(addr as usize)
|
||||
impl MbcIo for NoMbc {
|
||||
fn handle_read(&self, addr: u16) -> MbcResult {
|
||||
MbcResult::Addr(addr as usize)
|
||||
}
|
||||
|
||||
fn handle_write(&mut self, _: u16, byte: u8) {
|
||||
|
@ -725,60 +725,60 @@ impl MBCIo for NoMBC {
|
|||
}
|
||||
}
|
||||
|
||||
impl RtClockTick for NoMBC {
|
||||
impl RtcTick for NoMbc {
|
||||
fn tick(&mut self) {}
|
||||
}
|
||||
|
||||
trait MBCIo: Savable + RtClockTick {
|
||||
fn handle_read(&self, addr: u16) -> MBCResult;
|
||||
trait MbcIo: Savable + RtcTick {
|
||||
fn handle_read(&self, addr: u16) -> MbcResult;
|
||||
fn handle_write(&mut self, addr: u16, byte: u8);
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBCResult {
|
||||
enum MbcResult {
|
||||
Addr(usize),
|
||||
Byte(u8),
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBCKind {
|
||||
enum MbcKind {
|
||||
None,
|
||||
MBC1(MBC1Hardware),
|
||||
MBC2(MBC2Hardware),
|
||||
MBC3(MBC3Hardware),
|
||||
MBC5(MBC5Hardware),
|
||||
Mbc1(Mbc1Hardware),
|
||||
Mbc2(Mbc2Hardware),
|
||||
Mbc3(Mbc3Hardware),
|
||||
Mbc4(Mbc5Hardware),
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBC1Hardware {
|
||||
enum Mbc1Hardware {
|
||||
None,
|
||||
RAM,
|
||||
BatteryRAM,
|
||||
Ram,
|
||||
BatteryRam,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBC2Hardware {
|
||||
enum Mbc2Hardware {
|
||||
None,
|
||||
BatteryRAM,
|
||||
BatteryRam,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBC3Hardware {
|
||||
RTC,
|
||||
RTCAndBatteryRAM,
|
||||
enum Mbc3Hardware {
|
||||
Rtc,
|
||||
RtcBatteryRam,
|
||||
None,
|
||||
RAM,
|
||||
BatteryRAM,
|
||||
Ram,
|
||||
BatteryRam,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBC5Hardware {
|
||||
enum Mbc5Hardware {
|
||||
None,
|
||||
RAM,
|
||||
BatteryRAM,
|
||||
Ram,
|
||||
BatteryRam,
|
||||
Rumble,
|
||||
RumbleRAM,
|
||||
RumbleBatteryRAM,
|
||||
RumbleRam,
|
||||
RumbleBatteryRam,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy, PartialEq)]
|
||||
|
@ -874,7 +874,7 @@ impl From<u8> for RomSize {
|
|||
}
|
||||
}
|
||||
|
||||
impl std::fmt::Debug for Box<dyn MBCIo> {
|
||||
impl std::fmt::Debug for Box<dyn MbcIo> {
|
||||
fn fmt(&self, _f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
|
||||
todo!("Implement Debug for Box<dyn MBC> Trait Object");
|
||||
}
|
||||
|
|
11
src/ppu.rs
11
src/ppu.rs
|
@ -797,21 +797,12 @@ impl Default for BackgroundFetcher {
|
|||
}
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
#[derive(Debug, Default)]
|
||||
struct ObjectFetcher {
|
||||
state: FetcherState,
|
||||
tile: TileBuilder,
|
||||
}
|
||||
|
||||
impl Default for ObjectFetcher {
|
||||
fn default() -> Self {
|
||||
Self {
|
||||
state: Default::default(),
|
||||
tile: Default::default(),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl Fetcher for ObjectFetcher {
|
||||
fn reset(&mut self) {
|
||||
self.state = Default::default();
|
||||
|
|
Loading…
Reference in New Issue