fix(apu): implement some obscure behaviour for ch1,2 & 3
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2ef8fefbb7
commit
32405c0734
177
src/apu.rs
177
src/apu.rs
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@ -27,7 +27,7 @@ pub struct Apu {
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/// Noise
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ch4: Channel4,
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sequencer: FrameSequencer,
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fs: FrameSequencer,
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div_prev: Option<u16>,
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prod: Option<SampleProducer<f32>>,
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@ -69,16 +69,16 @@ impl BusIo for Apu {
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0x11 if self.ctrl.enabled => self.ch1.set_duty(byte),
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0x12 if self.ctrl.enabled => self.ch1.set_envelope(byte),
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0x13 if self.ctrl.enabled => self.ch1.set_freq_lo(byte),
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0x14 if self.ctrl.enabled => self.ch1.set_freq_hi(&self.sequencer, byte),
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0x14 if self.ctrl.enabled => self.ch1.set_freq_hi(&self.fs, byte),
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0x16 if self.ctrl.enabled => self.ch2.set_duty(byte),
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0x17 if self.ctrl.enabled => self.ch2.set_envelope(byte),
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0x18 if self.ctrl.enabled => self.ch2.set_freq_lo(byte),
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0x19 if self.ctrl.enabled => self.ch2.set_freq_hi(byte),
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0x19 if self.ctrl.enabled => self.ch2.set_freq_hi(&self.fs, byte),
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0x1A if self.ctrl.enabled => self.ch3.set_dac_enabled(byte),
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0x1B if self.ctrl.enabled => self.ch3.set_len(byte),
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0x1C if self.ctrl.enabled => self.ch3.set_volume(byte),
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0x1D if self.ctrl.enabled => self.ch3.set_freq_lo(byte),
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0x1E if self.ctrl.enabled => self.ch3.set_freq_hi(byte),
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0x1E if self.ctrl.enabled => self.ch3.set_freq_hi(&self.fs, byte),
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0x20 if self.ctrl.enabled => self.ch4.set_len(byte),
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0x21 if self.ctrl.enabled => self.ch4.set_envelope(byte),
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0x22 if self.ctrl.enabled => self.ch4.set_poly(byte),
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@ -101,7 +101,7 @@ impl Apu {
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if self.is_falling_edge(12, div) {
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use FSState::*;
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match self.sequencer.state() {
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match self.fs.state() {
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Length => self.clock_length(),
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LengthAndSweep => {
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self.clock_length();
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@ -111,7 +111,7 @@ impl Apu {
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Nothing => {}
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}
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self.sequencer.next();
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self.fs.next();
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}
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self.div_prev = Some(div);
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@ -172,7 +172,7 @@ impl Apu {
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if self.ctrl.enabled {
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// Frame Sequencer reset to Step 0
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self.sequencer.reset();
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self.fs.reset();
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// Square Duty units are reset to first step
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self.ch1.duty_pos = 0;
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@ -258,13 +258,13 @@ impl Apu {
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Self::process_length(
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&self.ch2.freq_hi,
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&mut self.ch2.length_timer,
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&mut self.ch2.length_counter,
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&mut self.ch2.enabled,
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);
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Self::process_length(
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&self.ch3.freq_hi,
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&mut self.ch3.length_timer,
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&mut self.ch3.length_counter,
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&mut self.ch3.enabled,
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);
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@ -488,36 +488,33 @@ impl Channel1 {
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let prev_le = self.freq_hi.length_enable();
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self.freq_hi = byte.into();
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if !fs.next_clocks_length() {
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if !prev_le && self.freq_hi.length_enable() && self.length_counter != 0 {
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self.length_counter -= 1;
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if self.length_counter == 0 && !self.freq_hi.initial() {
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self.enabled = false;
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}
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}
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}
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obscure::nrx4::length_update(
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&mut self.freq_hi,
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fs,
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&mut self.length_counter,
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&mut self.enabled,
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prev_le,
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);
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// If this bit is set, a trigger event occurs
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if self.freq_hi.initial() {
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if self.is_dac_enabled() {
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self.enabled = true;
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}
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if self.freq_hi.trigger() {
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self.enabled = true;
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// Length behaviour during trigger event
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if self.length_counter == 0 {
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self.length_counter = if self.freq_hi.length_enable() && !fs.next_clocks_length() {
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63
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} else {
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64
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};
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self.length_counter = obscure::length_reload(&self.freq_hi, fs, 64);
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};
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// Envelope Behaviour during trigger event
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// reload freq_timer but last two bits are unmodified
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self.freq_timer = obscure::square::freq_timer_reload(self.freq_timer, self.frequency());
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// Volume Envelope loaded w/ period
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self.period_timer = self.envelope.period();
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// Channel Volume reloaded
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self.current_volume = self.envelope.init_vol();
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// Sweep behaviour during trigger event
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// Channel 1 Sweep Behaviour
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let sweep_period = self.sweep.period();
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let sweep_shift = self.sweep.shift_count();
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@ -529,6 +526,8 @@ impl Channel1 {
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if sweep_shift != 0 {
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let _ = self.calc_sweep_freq();
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}
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self.enabled = self.is_dac_enabled();
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}
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}
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@ -603,7 +602,7 @@ pub(crate) struct Channel2 {
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current_volume: u8,
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// Length Functionality
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length_timer: u16,
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length_counter: u16,
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freq_timer: u16,
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duty_pos: u8,
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@ -620,7 +619,7 @@ impl Channel2 {
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/// 0xFF16 | NR21 - Channel 2 Sound length / Wave Pattern Duty
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pub(crate) fn set_duty(&mut self, byte: u8) {
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self.duty = byte.into();
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self.length_timer = 64 - self.duty.sound_length() as u16;
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self.length_counter = 64 - self.duty.sound_length() as u16;
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}
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/// 0xFF17 | NR22 - Channel 2 Volume ENvelope
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@ -648,22 +647,36 @@ impl Channel2 {
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}
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/// 0xFF19 | NR24 - Channel 2 Frequency high
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pub(crate) fn set_freq_hi(&mut self, byte: u8) {
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pub(crate) fn set_freq_hi(&mut self, fs: &FrameSequencer, byte: u8) {
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let prev_le = self.freq_hi.length_enable();
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self.freq_hi = byte.into();
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if self.freq_hi.initial() {
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// Envelope behaviour during trigger event
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obscure::nrx4::length_update(
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&mut self.freq_hi,
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fs,
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&mut self.length_counter,
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&mut self.enabled,
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prev_le,
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);
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if self.freq_hi.trigger() {
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self.enabled = true;
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// Reload length counter if need be
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if self.length_counter == 0 {
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self.length_counter = obscure::length_reload(&self.freq_hi, fs, 64);
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}
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// reload frequency timer
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self.freq_timer = obscure::square::freq_timer_reload(self.freq_timer, self.frequency());
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// reload envelope
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self.period_timer = self.envelope.period();
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// reload volume
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self.current_volume = self.envelope.init_vol();
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// Length behaviour during trigger event
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if self.length_timer == 0 {
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self.length_timer = 64;
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}
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if self.is_dac_enabled() {
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self.enabled = true;
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}
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self.enabled = self.is_dac_enabled();
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}
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}
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@ -714,7 +727,7 @@ pub(crate) struct Channel3 {
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wave_ram: [u8; WAVE_PATTERN_RAM_LEN],
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// Length Functionality
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length_timer: u16,
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length_counter: u16,
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freq_timer: u16,
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offset: u8,
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@ -760,7 +773,7 @@ impl Channel3 {
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/// 0xFF1B | NR31 - Sound Length
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pub(crate) fn set_len(&mut self, byte: u8) {
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self.len = byte;
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self.length_timer = 256 - self.len as u16;
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self.length_counter = 256 - self.len as u16;
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}
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/// 0xFF1C | NR32 - Channel 3 Volume
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@ -792,18 +805,32 @@ impl Channel3 {
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}
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/// 0xFF1E | NR34 - Channel 3 Frequency high
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pub(crate) fn set_freq_hi(&mut self, byte: u8) {
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pub(crate) fn set_freq_hi(&mut self, fs: &FrameSequencer, byte: u8) {
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let prev_le = self.freq_hi.length_enable();
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self.freq_hi = byte.into();
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if self.freq_hi.initial() {
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obscure::nrx4::length_update(
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&mut self.freq_hi,
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fs,
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&mut self.length_counter,
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&mut self.enabled,
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prev_le,
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);
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if self.freq_hi.trigger() {
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self.enabled = true;
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// Length behaviour during trigger event
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if self.length_timer == 0 {
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self.length_timer = 256;
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if self.length_counter == 0 {
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self.length_counter = obscure::length_reload(&self.freq_hi, fs, 256);
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}
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if self.dac_enabled {
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self.enabled = true;
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}
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self.freq_timer = (2048 - self.frequency()) * 2;
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// reset wave channel's ptr into wave RAM
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self.offset = 0;
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self.enabled = self.dac_enabled;
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}
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}
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@ -972,3 +999,51 @@ impl Channel4 {
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code << 4
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}
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}
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mod obscure {
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use super::{FrameSequencer, FrequencyHigh};
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pub(super) mod square {
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pub(crate) fn freq_timer_reload(freq_timer: u16, frequency: u16) -> u16 {
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(freq_timer & 0x0003) | (((2048 - frequency) * 4) & 0xFFFC)
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}
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}
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pub(super) mod nrx4 {
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use super::super::{FrameSequencer, FrequencyHigh};
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/// Implements the obscure behaviour when writing to NRX4 under certain
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/// conditions
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///
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/// # Arguments
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/// * `freq_hi` - mutable reference to a channel's frequency high register
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/// * `fs` - reference to the APU's frame sequencer
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/// * `counter` - mutable reference to a channel's internal enabled flag
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/// * `prev_le` - what length_enable was before NRx4 was written with a new value
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pub(crate) fn length_update(
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freq_hi: &mut FrequencyHigh,
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fs: &FrameSequencer,
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counter: &mut u16,
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enabled: &mut bool,
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prev_le: bool,
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) {
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if !fs.next_clocks_length() {
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if !prev_le && freq_hi.length_enable() && *counter != 0 {
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*counter -= 1;
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if *counter == 0 && !freq_hi.trigger() {
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*enabled = false;
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}
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}
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}
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}
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}
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pub(crate) fn length_reload(freq_hi: &FrequencyHigh, fs: &FrameSequencer, default: u16) -> u16 {
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if !fs.next_clocks_length() && freq_hi.length_enable() {
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default - 1
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} else {
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default
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}
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}
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}
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@ -223,14 +223,14 @@ pub(super) mod common {
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bitfield! {
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pub struct FrequencyHigh(u8);
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impl Debug;
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_initial, _: 7;
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_trigger, _: 7;
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_length_enable, _: 6;
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pub freq_bits, set_freq_bits: 2, 0;
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}
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impl FrequencyHigh {
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pub(crate) fn initial(&self) -> bool {
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self._initial()
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pub(crate) fn trigger(&self) -> bool {
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self._trigger()
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}
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pub(crate) fn length_enable(&self) -> bool {
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