fix: remove redundant casts from zig fmt

build.zig.zon

@@ -3,8 +3,8 @@
     .version = "0.1.0",
     .dependencies = .{
         .@"zba-util" = .{
-            .url = "https://git.musuka.dev/paoda/zba-util/archive/e616cf09e53f5c402c8f040d14baa211683e70e3.tar.gz",
+            .url = "https://git.musuka.dev/paoda/zba-util/archive/322c798e384a0d24cc84ffcfa2e4a3ca807798a0.tar.gz",
-            .hash = "1220b80b2c0989dcc47275ab9d7d70da4858ef3c1fe1f934e8d838e65028127f6ef3",
+            .hash = "12209ce0e729460b997706e47a53a32f1842672cd120189e612f4871731780a30ed0",
         },
     },
 }

lib/bitfield.zig

@@ -26,13 +26,13 @@ fn BitType(comptime FieldType: type, comptime ValueType: type, comptime shamt: u
         }
 
         pub fn read(self: anytype) ValueType {
-            return @bitCast(ValueType, @truncate(u1, self.bits.field().* >> shamt));
+            return @as(ValueType, @bitCast(@as(u1, @truncate(self.bits.field().* >> shamt))));
         }
 
         // Since these are mostly used with MMIO, I want to avoid
         // reading the memory just to write it again, also races
         pub fn write(self: anytype, val: ValueType) void {
-            if (@bitCast(bool, val)) {
+            if (@as(bool, @bitCast(val))) {
                 self.set();
             } else {
                 self.unset();
@@ -67,17 +67,17 @@ pub fn Bitfield(comptime FieldType: type, comptime shamt: usize, comptime num_bi
         dummy: FieldType,
 
         fn field(self: anytype) PtrCastPreserveCV(@This(), @TypeOf(self), FieldType) {
-            return @ptrCast(PtrCastPreserveCV(@This(), @TypeOf(self), FieldType), self);
+            return @as(PtrCastPreserveCV(@This(), @TypeOf(self), FieldType), @ptrCast(self));
         }
 
         pub fn write(self: anytype, val: ValueType) void {
             self.field().* &= ~self_mask;
-            self.field().* |= @intCast(FieldType, val) << shamt;
+            self.field().* |= @as(FieldType, @intCast(val)) << shamt;
         }
 
         pub fn read(self: anytype) ValueType {
             const val: FieldType = self.field().*;
-            return @intCast(ValueType, (val & self_mask) >> shamt);
+            return @as(ValueType, @intCast((val & self_mask) >> shamt));
         }
     };
 }

src/arm.zig

@@ -58,6 +58,7 @@ pub fn Arm32(comptime arch: Architecture) type {
                 return self.stage[0] != null and self.stage[1] != null;
             }
 
+            // TODO: Why does this not return T?
             pub fn step(self: *@This(), cpu: *Self, comptime T: type) ?u32 {
                 comptime std.debug.assert(T == u32 or T == u16);
 
@@ -174,7 +175,7 @@ pub fn Arm32(comptime arch: Architecture) type {
         }
 
         pub fn setCpsr(self: *Self, value: u32) void {
-            if (value & 0x1F != self.cpsr.raw & 0x1F) self.changeModeFromIdx(@as(u5, @truncate(value & 0x1F)));
+            if (value & 0x1F != self.cpsr.raw & 0x1F) self.changeModeFromIdx(@truncate(value & 0x1F));
             self.cpsr.raw = value;
         }
 
@@ -267,12 +268,12 @@ pub fn Arm32(comptime arch: Architecture) type {
             }
 
             if (self.cpsr.t.read()) {
-                const opcode = @as(u16, @truncate(self.pipe.step(self, u16) orelse return));
+                const opcode: u16 = @truncate(self.pipe.step(self, u16) orelse return);
                 thumb.lut[thumb.idx(opcode)](self, self.bus, opcode);
             } else {
                 const opcode = self.pipe.step(self, u32) orelse return;
 
-                if (self.cpsr.check(@as(u4, @truncate(opcode >> 28)))) {
+                if (self.cpsr.check(@truncate(opcode >> 28))) {
                     arm.lut[arm.idx(opcode)](self, self.bus, opcode);
                 }
             }
@@ -391,7 +392,7 @@ pub const PSR = extern union {
     }
 
     pub inline fn check(self: @This(), cond: u4) bool {
-        const flags = @as(u4, @truncate(self.raw >> 28));
+        const flags: u4 = @truncate(self.raw >> 28);
 
         return condition_lut[cond] & (@as(u16, 1) << flags) != 0;
     }

src/arm/cpu/arm/block_data_transfer.zig

@@ -5,7 +5,7 @@ pub fn blockDataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: b
 
     return struct {
         fn inner(cpu: Arm32, bus: Bus, opcode: u32) void {
-            const rn = @as(u4, @truncate(opcode >> 16 & 0xF));
+            const rn: u4 = @truncate(opcode >> 16 & 0xF);
             const rlist = opcode & 0xFFFF;
             const r15 = rlist >> 15 & 1 == 1;
 
@@ -15,7 +15,7 @@ pub fn blockDataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: b
             var write_to_base = true;
 
             while (i < 16) : (i += 1) {
-                const r = @as(u4, @truncate(15 - i));
+                const r: u4 = @truncate(15 - i);
                 if (rlist >> r & 1 == 1) {
                     first = r;
                     count += 1;

src/arm/cpu/arm/data_processing.zig

@@ -8,7 +8,7 @@ pub fn dataProcessing(comptime InstrFn: type, comptime I: bool, comptime S: bool
 
     return struct {
         fn inner(cpu: Arm32, _: Bus, opcode: u32) void {
-            const rd = @as(u4, @truncate(opcode >> 12 & 0xF));
+            const rd: u4 = @truncate(opcode >> 12 & 0xF);
             const rn = opcode >> 16 & 0xF;
             const old_carry = @intFromBool(cpu.cpsr.c.read());
 
@@ -17,7 +17,7 @@ pub fn dataProcessing(comptime InstrFn: type, comptime I: bool, comptime S: bool
             if (!I and opcode >> 4 & 1 == 1) cpu.r[15] += 4;
             const op1 = cpu.r[rn];
 
-            const amount = @as(u8, @truncate((opcode >> 8 & 0xF) << 1));
+            const amount: u8 = @truncate((opcode >> 8 & 0xF) << 1);
             const op2 = if (I) ror(S, &cpu.cpsr, opcode & 0xFF, amount) else exec(S, cpu, opcode);
 
             // Undo special condition from above
@@ -164,9 +164,7 @@ pub fn dataProcessing(comptime InstrFn: type, comptime I: bool, comptime S: bool
 pub fn sbc(left: u32, right: u32, old_carry: u1) u32 {
     // TODO: Make your own version (thanks peach.bot)
     const subtrahend = @as(u64, right) -% old_carry +% 1;
-    const ret = @as(u32, @truncate(left -% subtrahend));
+    return @truncate(left -% subtrahend);
-
-    return ret;
 }
 
 pub fn add(overflow: *u1, left: u32, right: u32) u32 {

src/arm/cpu/arm/half_signed_data_transfer.zig

@@ -34,6 +34,8 @@ pub fn halfAndSignedDataTransfer(comptime InstrFn: type, comptime P: bool, compt
                     0b11 => {
                         // LDRSH
                         const value = bus.read(u16, address);
+
+                        // FIXME: I shouldn't have to use @as(u8, ...) here
                         result = if (address & 1 == 1) sext(u32, u8, @as(u8, @truncate(value >> 8))) else sext(u32, u16, value);
                     },
                     0b00 => unreachable, // SWP
@@ -41,6 +43,8 @@ pub fn halfAndSignedDataTransfer(comptime InstrFn: type, comptime P: bool, compt
             } else {
                 if (opcode >> 5 & 0x01 == 0x01) {
                     // STRH
+
+                    // FIXME: I shouldn't have to use @as(u8, ...) here
                     bus.write(u16, address, @as(u16, @truncate(cpu.r[rd])));
                 } else unreachable; // SWP
             }

src/arm/cpu/arm/multiply.zig

@@ -11,7 +11,7 @@ pub fn multiply(comptime InstrFn: type, comptime A: bool, comptime S: bool) Inst
             const rm = opcode & 0xF;
 
             const temp: u64 = @as(u64, cpu.r[rm]) * @as(u64, cpu.r[rs]) + if (A) cpu.r[rn] else 0;
-            const result = @as(u32, @truncate(temp));
+            const result: u32 = @truncate(temp);
             cpu.r[rd] = result;
 
             if (S) {
@@ -36,17 +36,17 @@ pub fn multiplyLong(comptime InstrFn: type, comptime U: bool, comptime A: bool,
             if (U) {
                 // Signed (WHY IS IT U THEN?)
                 var result: i64 = @as(i64, @as(i32, @bitCast(cpu.r[rm]))) * @as(i64, @as(i32, @bitCast(cpu.r[rs])));
-                if (A) result +%= @as(i64, @bitCast(@as(u64, cpu.r[rd_hi]) << 32 | @as(u64, cpu.r[rd_lo])));
+                if (A) result +%= @bitCast(@as(u64, cpu.r[rd_hi]) << 32 | @as(u64, cpu.r[rd_lo]));
 
-                cpu.r[rd_hi] = @as(u32, @bitCast(@as(i32, @truncate(result >> 32))));
+                cpu.r[rd_hi] = @bitCast(@as(i32, @truncate(result >> 32)));
-                cpu.r[rd_lo] = @as(u32, @bitCast(@as(i32, @truncate(result))));
+                cpu.r[rd_lo] = @bitCast(@as(i32, @truncate(result)));
             } else {
                 // Unsigned
                 var result: u64 = @as(u64, cpu.r[rm]) * @as(u64, cpu.r[rs]);
                 if (A) result +%= @as(u64, cpu.r[rd_hi]) << 32 | @as(u64, cpu.r[rd_lo]);
 
-                cpu.r[rd_hi] = @as(u32, @truncate(result >> 32));
+                cpu.r[rd_hi] = @truncate(result >> 32);
-                cpu.r[rd_lo] = @as(u32, @truncate(result));
+                cpu.r[rd_lo] = @truncate(result);
             }
 
             if (S) {

src/arm/cpu/arm/psr_transfer.zig

@@ -22,7 +22,7 @@ pub fn psrTransfer(comptime InstrFn: type, comptime I: bool, comptime R: bool, c
                 },
                 0b10 => {
                     // MSR
-                    const field_mask = @as(u4, @truncate(opcode >> 16 & 0xF));
+                    const field_mask: u4 = @truncate(opcode >> 16 & 0xF);
                     const rm_idx = opcode & 0xF;
                     const right = if (I) rotr(u32, opcode & 0xFF, (opcode >> 8 & 0xF) * 2) else cpu.r[rm_idx];
 
@@ -46,7 +46,7 @@ pub fn psrTransfer(comptime InstrFn: type, comptime I: bool, comptime R: bool, c
 fn fieldMask(psr: *const PSR, field_mask: u4, right: u32) u32 {
     // This bitwise ORs bits 3 and 0 of the field mask into a u2
     // We do this because we only care about bits 7:0 and 31:28 of the CPSR
-    const bits = @as(u2, @truncate((field_mask >> 2 & 0x2) | (field_mask & 1)));
+    const bits: u2 = @truncate((field_mask >> 2 & 0x2) | (field_mask & 1));
 
     const mask: u32 = switch (bits) {
         0b00 => 0x0000_0000,

src/arm/cpu/arm/single_data_swap.zig

@@ -16,6 +16,8 @@ pub fn singleDataSwap(comptime InstrFn: type, comptime B: bool) InstrFn {
             if (B) {
                 // SWPB
                 const value = bus.read(u8, address);
+
+                // FIXME: I shouldn't have to use @as(u8, ...) here
                 bus.write(u8, address, @as(u8, @truncate(cpu.r[rm])));
                 cpu.r[rd] = value;
             } else {

src/arm/cpu/arm/single_data_transfer.zig

@@ -31,6 +31,8 @@ pub fn singleDataTransfer(comptime InstrFn: type, comptime I: bool, comptime P:
                 if (B) {
                     // STRB
                     const value = cpu.r[rd] + if (rd == 0xF) 4 else @as(u32, 0); // PC is 12 ahead
+
+                    // FIXME: I shouldn't have to use @as(u8, ...) here
                     bus.write(u8, address, @as(u8, @truncate(value)));
                 } else {
                     // STR

src/arm/cpu/barrel_shifter.zig

@@ -16,7 +16,7 @@ pub fn exec(comptime S: bool, cpu: anytype, opcode: u32) u32 {
 fn register(comptime S: bool, cpu: anytype, opcode: u32) u32 {
     const rs_idx = opcode >> 8 & 0xF;
     const rm = cpu.r[opcode & 0xF];
-    const rs = @as(u8, @truncate(cpu.r[rs_idx]));
+    const rs: u8 = @truncate(cpu.r[rs_idx]);
 
     return switch (@as(u2, @truncate(opcode >> 5))) {
         0b00 => lsl(S, &cpu.cpsr, rm, rs),
@@ -27,9 +27,10 @@ fn register(comptime S: bool, cpu: anytype, opcode: u32) u32 {
 }
 
 pub fn immediate(comptime S: bool, cpu: anytype, opcode: u32) u32 {
-    const amount = @as(u8, @truncate(opcode >> 7 & 0x1F));
+    const amount: u8 = @truncate(opcode >> 7 & 0x1F);
     const rm = cpu.r[opcode & 0xF];
 
+    // FIXME: I don't think result needs to be mutable here
     var result: u32 = undefined;
     if (amount == 0) {
         switch (@as(u2, @truncate(opcode >> 5))) {
@@ -44,7 +45,7 @@ pub fn immediate(comptime S: bool, cpu: anytype, opcode: u32) u32 {
             },
             0b10 => {
                 // ASR #0 aka ASR #32
-                result = @as(u32, @bitCast(@as(i32, @bitCast(rm)) >> 31));
+                result = @bitCast(@as(i32, @bitCast(rm)) >> 31);
                 if (S) cpu.cpsr.c.write(result >> 31 & 1 == 1);
             },
             0b11 => {
@@ -68,7 +69,7 @@ pub fn immediate(comptime S: bool, cpu: anytype, opcode: u32) u32 {
 }
 
 pub fn lsl(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
-    const amount = @as(u5, @truncate(total_amount));
+    const amount: u5 = @truncate(total_amount);
     const bit_count: u8 = @typeInfo(u32).Int.bits;
 
     var result: u32 = 0x0000_0000;
@@ -77,7 +78,7 @@ pub fn lsl(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
         result = rm << amount;
 
         if (S and total_amount != 0) {
-            const carry_bit = @as(u5, @truncate(bit_count - amount));
+            const carry_bit: u5 = @truncate(bit_count - amount);
             cpsr.c.write(rm >> carry_bit & 1 == 1);
         }
     } else {
@@ -95,7 +96,7 @@ pub fn lsl(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
 }
 
 pub fn lsr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
-    const amount = @as(u5, @truncate(total_amount));
+    const amount: u5 = @truncate(total_amount);
     const bit_count: u8 = @typeInfo(u32).Int.bits;
 
     var result: u32 = 0x0000_0000;
@@ -119,16 +120,16 @@ pub fn lsr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
 }
 
 pub fn asr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
-    const amount = @as(u5, @truncate(total_amount));
+    const amount: u5 = @truncate(total_amount);
     const bit_count: u8 = @typeInfo(u32).Int.bits;
 
     var result: u32 = 0x0000_0000;
     if (total_amount < bit_count) {
-        result = @as(u32, @bitCast(@as(i32, @bitCast(rm)) >> amount));
+        result = @bitCast(@as(i32, @bitCast(rm)) >> amount);
         if (S and total_amount != 0) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
     } else {
         // ASR #32 and ASR #>32 have the same result
-        result = @as(u32, @bitCast(@as(i32, @bitCast(rm)) >> 31));
+        result = @bitCast(@as(i32, @bitCast(rm)) >> 31);
         if (S) cpsr.c.write(result >> 31 & 1 == 1);
     }
 

src/arm/cpu/thumb/alu.zig

@@ -26,12 +26,12 @@ pub fn fmt4(comptime InstrFn: type, comptime op: u4) InstrFn {
             switch (op) {
                 0x0 => result = op1 & op2, // AND
                 0x1 => result = op1 ^ op2, // EOR
-                0x2 => result = lsl(true, &cpu.cpsr, op1, @as(u8, @truncate(op2))), // LSL
+                0x2 => result = lsl(true, &cpu.cpsr, op1, @truncate(op2)), // LSL
-                0x3 => result = lsr(true, &cpu.cpsr, op1, @as(u8, @truncate(op2))), // LSR
+                0x3 => result = lsr(true, &cpu.cpsr, op1, @truncate(op2)), // LSR
-                0x4 => result = asr(true, &cpu.cpsr, op1, @as(u8, @truncate(op2))), // ASR
+                0x4 => result = asr(true, &cpu.cpsr, op1, @truncate(op2)), // ASR
                 0x5 => result = adc(&overflow, op1, op2, carry), // ADC
                 0x6 => result = sbc(op1, op2, carry), // SBC
-                0x7 => result = ror(true, &cpu.cpsr, op1, @as(u8, @truncate(op2))), // ROR
+                0x7 => result = ror(true, &cpu.cpsr, op1, @truncate(op2)), // ROR
                 0x8 => result = op1 & op2, // TST
                 0x9 => result = 0 -% op2, // NEG
                 0xA => result = op1 -% op2, // CMP
@@ -42,7 +42,7 @@ pub fn fmt4(comptime InstrFn: type, comptime op: u4) InstrFn {
                     overflow = tmp[1];
                 },
                 0xC => result = op1 | op2, // ORR
-                0xD => result = @as(u32, @truncate(@as(u64, op2) * @as(u64, op1))),
+                0xD => result = @truncate(@as(u64, op2) * @as(u64, op1)),
                 0xE => result = op1 & ~op2,
                 0xF => result = ~op2,
             }

src/arm/cpu/thumb/data_processing.zig

@@ -14,7 +14,7 @@ pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrF
             const rs = opcode >> 3 & 0x7;
             const rd = opcode & 0x7;
 
-            const result = switch (op) {
+            const result: u32 = switch (op) {
                 0b00 => blk: {
                     // LSL
                     if (offset == 0) {
@@ -36,7 +36,7 @@ pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrF
                     // ASR
                     if (offset == 0) {
                         cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
-                        break :blk @as(u32, @bitCast(@as(i32, @bitCast(cpu.r[rs])) >> 31));
+                        break :blk @bitCast(@as(i32, @bitCast(cpu.r[rs])) >> 31);
                     } else {
                         break :blk asr(true, &cpu.cpsr, cpu.r[rs], offset);
                     }
@@ -115,7 +115,7 @@ pub fn fmt2(comptime InstrFn: type, comptime I: bool, is_sub: bool, rn: u3) Inst
     return struct {
         fn inner(cpu: Arm32, _: Bus, opcode: u16) void {
             const rs = opcode >> 3 & 0x7;
-            const rd = @as(u3, @truncate(opcode));
+            const rd: u3 = @truncate(opcode);
             const op1 = cpu.r[rs];
             const op2: u32 = if (I) rn else cpu.r[rn];
 

src/arm/cpu/thumb/data_transfer.zig

@@ -33,6 +33,8 @@ pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn
                 switch (op) {
                     0b00 => {
                         // STRH
+
+                        // FIXME: I shouldn't have to use @as(u8, ...) here
                         bus.write(u16, address, @as(u16, @truncate(cpu.r[rd])));
                     },
                     0b01 => {
@@ -47,6 +49,8 @@ pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn
                     0b11 => {
                         // LDRSH
                         const value = bus.read(u16, address);
+
+                        // FIXME: I shouldn't have to use @as(u8, ...) here
                         cpu.r[rd] = if (address & 1 == 1) sext(u32, u8, @as(u8, @truncate(value >> 8))) else sext(u32, u16, value);
                     },
                 }
@@ -59,6 +63,8 @@ pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn
                     },
                     0b01 => {
                         // STRB
+
+                        // FIXME: I shouldn't have to use @as(u8, ...) here
                         bus.write(u8, address, @as(u8, @truncate(cpu.r[rd])));
                     },
                     0b10 => {
@@ -99,6 +105,8 @@ pub fn fmt9(comptime InstrFn: type, comptime B: bool, comptime L: bool, comptime
                 if (B) {
                     // STRB
                     const address = cpu.r[rb] + offset;
+
+                    // FIXME: I shouldn't have to use @as(u8, ...) here
                     bus.write(u8, address, @as(u8, @truncate(cpu.r[rd])));
                 } else {
                     // STR
@@ -126,6 +134,8 @@ pub fn fmt10(comptime InstrFn: type, comptime L: bool, comptime offset: u5) Inst
                 cpu.r[rd] = rotr(u32, value, 8 * (address & 1));
             } else {
                 // STRH
+
+                // FIXME: I shouldn't have to use @as(u8, ...) here
                 bus.write(u16, address, @as(u16, @truncate(cpu.r[rd])));
             }
         }

src/arm/v4t.zig

@@ -20,6 +20,7 @@ pub fn arm(comptime Arm32: type) type {
 
         /// Determine index into ARM InstrFn LUT
         pub fn idx(opcode: u32) u12 {
+            // FIXME: omit these?
             return @as(u12, @truncate(opcode >> 20 & 0xFF)) << 4 | @as(u12, @truncate(opcode >> 4 & 0xF));
         }
 
@@ -117,7 +118,7 @@ pub fn thumb(comptime Arm32: type) type {
 
         /// Determine index into THUMB InstrFn LUT
         pub fn idx(opcode: u16) u10 {
-            return @as(u10, @truncate(opcode >> 6));
+            return @truncate(opcode >> 6);
         }
 
         /// Undefined THUMB Instruction Handler