chore: semi-pass more rockwrestler tests

This commit is contained in:
Rekai Nyangadzayi Musuka 2023-09-14 22:04:09 -05:00
parent 514e4d6014
commit 71541c312c
1 changed files with 21 additions and 9 deletions

View File

@ -61,7 +61,7 @@ pub fn control(comptime InstrFn: type, comptime I: bool, comptime op: u6) InstrF
cpu.r[rd] = @bitCast(if (U) left -| right else left +| right); cpu.r[rd] = @bitCast(if (U) left -| right else left +| right);
if (cpu.r[rd] == if (U) 0x8000_0000 else 0x7FFF_FFFF) cpu.cpsr.q.set(); if (cpu.r[rd] == 0x8000_0000 or cpu.r[rd] == 0x7FFF_FFFF) cpu.cpsr.q.set();
}, },
0b10_0101, 0b11_0101 => { // QDADD / QDSUB 0b10_0101, 0b11_0101 => { // QDADD / QDSUB
const U = op >> 4 & 1 == 1; const U = op >> 4 & 1 == 1;
@ -76,7 +76,7 @@ pub fn control(comptime InstrFn: type, comptime I: bool, comptime op: u6) InstrF
const left: i32 = @bitCast(cpu.r[rm]); const left: i32 = @bitCast(cpu.r[rm]);
cpu.r[rd] = @bitCast(if (U) left -| product else left +| product); cpu.r[rd] = @bitCast(if (U) left -| product else left +| product);
if (cpu.r[rd] == if (U) 0x800_0000 else 0x7FFF_FFFF) cpu.cpsr.q.set(); if (cpu.r[rd] == 0x8000_0000 or cpu.r[rd] == 0x7FFF_FFFF) cpu.cpsr.q.set();
}, },
0b01_0111 => cpu.panic("TODO: handle BKPT", .{}), 0b01_0111 => cpu.panic("TODO: handle BKPT", .{}),
0b00_1000, 0b00_1010, 0b00_1100, 0b00_1110 => { // SMLA<x><y> 0b00_1000, 0b00_1010, 0b00_1100, 0b00_1110 => { // SMLA<x><y>
@ -111,16 +111,18 @@ pub fn control(comptime InstrFn: type, comptime I: bool, comptime op: u6) InstrF
const right: i32 = @as(i16, @bitCast(@as(u16, @truncate(cpu.r[rs] >> 16 * Y)))); const right: i32 = @as(i16, @bitCast(@as(u16, @truncate(cpu.r[rs] >> 16 * Y))));
// TODO: de-clutter this lmao // TODO: de-clutter this lmao
cpu.r[rd_lo] = @bitCast(@as(i32, @bitCast(cpu.r[rd_lo])) + (left * right)); const rdlo_val: i32 = @bitCast(cpu.r[rd_lo]);
const product = left * right;
// WHY DOESN'T THIS WORK????????
cpu.r[rd_lo] = @bitCast(rdlo_val + product);
cpu.r[rd_hi] = blk: { cpu.r[rd_hi] = blk: {
const _left: i32 = @bitCast(cpu.r[rd_hi]); // FIXME: I think this has to do with correcting sign values?
const _mid: i32 = if (left * right < 0) @bitCast(@as(u32, 0xFFFF_FFFF)) else 0; const offset_thing: i32 = @bitCast(if (product < 0) 0xFFFF_FFFF else @as(u32, 0));
// FIXME: chances are the read from rd_lo here is incorrect const rdhi_val: i32 = @bitCast(cpu.r[rd_hi]);
const _right: i32 = @addWithOverflow(@as(i32, @bitCast(cpu.r[rd_lo])), left * right)[1]; break :blk @bitCast(rdhi_val + offset_thing + @addWithOverflow(rdlo_val, product)[1]);
break :blk @bitCast(_left + _mid + _right);
}; };
}, },
0b01_1000, 0b01_1100 => { // SMLAW<y> 0b01_1000, 0b01_1100 => { // SMLAW<y>
@ -172,6 +174,16 @@ pub fn control(comptime InstrFn: type, comptime I: bool, comptime op: u6) InstrF
} }
} }
// TODO: make generic on any integer?
inline fn carryFrom(left: i32, right: i32) u1 {
const _left: u32 = @bitCast(left);
const _right: u32 = @bitCast(right);
const sum = @as(u64, _left) + @as(u64, _right);
return @intCast(sum >> 32 & 1);
}
inline fn msr(comptime R: bool, comptime imm: bool, cpu: *Arm32, opcode: u32) void { inline fn msr(comptime R: bool, comptime imm: bool, cpu: *Arm32, opcode: u32) void {
const field_mask: u4 = @truncate(opcode >> 16 & 0xF); const field_mask: u4 = @truncate(opcode >> 16 & 0xF);
const rm_idx = opcode & 0xF; const rm_idx = opcode & 0xF;