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chore: update to 0.12.0-dev.2063+804cee3b9

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This commit is contained in:
Rekai Nyangadzayi Musuka
2024-02-08 19:29:54 -06:00
parent eb8e5175bd
commit 8c3a166a5d
5 changed files with 60 additions and 73 deletions
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4
src/Packet.zig
View File

@@ -237,7 +237,7 @@ pub fn parse(self: *Self, allocator: Allocator, state: *Server.State, emu: *Emul
const ret = try allocator.alloc(u8, len);
ret[0] = if (ret.len < length) 'l' else 'm';
std.mem.copy(u8, ret[1..], state.target_xml[offset..]);
@memcpy(ret[1..], state.target_xml[offset..]);
return .{ .alloc = ret };
} else {
@@ -264,7 +264,7 @@ pub fn parse(self: *Self, allocator: Allocator, state: *Server.State, emu: *Emul
const ret = try allocator.alloc(u8, len);
ret[0] = if (ret.len < length) 'l' else 'm';
std.mem.copy(u8, ret[1..], state.memmap_xml[offset..]);
@memcpy(ret[1..], state.memmap_xml[offset..]);
return .{ .alloc = ret };
}

47
src/Server.zig
View File

@@ -2,7 +2,6 @@ const std = @import("std");
const Packet = @import("Packet.zig");
const Emulator = @import("lib.zig").Emulator;
const Atomic = std.atomic.Atomic;
const Allocator = std.mem.Allocator;
const Server = std.net.StreamServer;
const Connection = Server.Connection;
@@ -11,50 +10,6 @@ const Self = @This();
const log = std.log.scoped(.Server);
const port: u16 = 2424;
// TODO: move to ZBA
// pub const target: []const u8 =
// \\<target version="1.0">
// \\ <architecture>armv4t</architecture>
// \\ <feature name="org.gnu.gdb.arm.core">
// \\ <reg name="r0" bitsize="32" type="uint32"/>
// \\ <reg name="r1" bitsize="32" type="uint32"/>
// \\ <reg name="r2" bitsize="32" type="uint32"/>
// \\ <reg name="r3" bitsize="32" type="uint32"/>
// \\ <reg name="r4" bitsize="32" type="uint32"/>
// \\ <reg name="r5" bitsize="32" type="uint32"/>
// \\ <reg name="r6" bitsize="32" type="uint32"/>
// \\ <reg name="r7" bitsize="32" type="uint32"/>
// \\ <reg name="r8" bitsize="32" type="uint32"/>
// \\ <reg name="r9" bitsize="32" type="uint32"/>
// \\ <reg name="r10" bitsize="32" type="uint32"/>
// \\ <reg name="r11" bitsize="32" type="uint32"/>
// \\ <reg name="r12" bitsize="32" type="uint32"/>
// \\ <reg name="sp" bitsize="32" type="data_ptr"/>
// \\ <reg name="lr" bitsize="32"/>
// \\ <reg name="pc" bitsize="32" type="code_ptr"/>
// \\
// \\ <reg name="cpsr" bitsize="32" regnum="25"/>
// \\ </feature>
// \\</target>
// ;
// // Game Pak SRAM isn't included
// // TODO: Can i be more specific here?
// pub const memory_map: []const u8 =
// \\ <memory-map version="1.0">
// \\ <memory type="rom" start="0x00000000" length="0x00004000"/>
// \\ <memory type="ram" start="0x02000000" length="0x00040000"/>
// \\ <memory type="ram" start="0x03000000" length="0x00008000"/>
// \\ <memory type="ram" start="0x04000000" length="0x00000400"/>
// \\ <memory type="ram" start="0x05000000" length="0x00000400"/>
// \\ <memory type="ram" start="0x06000000" length="0x00018000"/>
// \\ <memory type="ram" start="0x07000000" length="0x00000400"/>
// \\ <memory type="rom" start="0x08000000" length="0x02000000"/>
// \\ <memory type="rom" start="0x0A000000" length="0x02000000"/>
// \\ <memory type="rom" start="0x0C000000" length="0x02000000"/>
// \\ </memory-map>
// ;
// FIXME: Shouldn't this be a Packet Struct?
pkt_cache: ?[]const u8 = null,
@@ -97,7 +52,7 @@ const Action = union(enum) {
nack,
};
pub fn run(self: *Self, allocator: Allocator, quit: *Atomic(bool)) !void {
pub fn run(self: *Self, allocator: Allocator, quit: *std.atomic.Value(bool)) !void {
var buf: [Packet.max_len]u8 = undefined;
var client = try self.socket.accept();

50
src/test.zig
View File

@@ -7,6 +7,49 @@ const Server = @import("Server.zig");
const Allocator = std.mem.Allocator;
const BarebonesEmulator = struct {
// I have this ARMv4T and GBA memory map xml lying around so we'll reuse it here
const target: []const u8 =
\\<target version="1.0">
\\ <architecture>armv4t</architecture>
\\ <feature name="org.gnu.gdb.arm.core">
\\ <reg name="r0" bitsize="32" type="uint32"/>
\\ <reg name="r1" bitsize="32" type="uint32"/>
\\ <reg name="r2" bitsize="32" type="uint32"/>
\\ <reg name="r3" bitsize="32" type="uint32"/>
\\ <reg name="r4" bitsize="32" type="uint32"/>
\\ <reg name="r5" bitsize="32" type="uint32"/>
\\ <reg name="r6" bitsize="32" type="uint32"/>
\\ <reg name="r7" bitsize="32" type="uint32"/>
\\ <reg name="r8" bitsize="32" type="uint32"/>
\\ <reg name="r9" bitsize="32" type="uint32"/>
\\ <reg name="r10" bitsize="32" type="uint32"/>
\\ <reg name="r11" bitsize="32" type="uint32"/>
\\ <reg name="r12" bitsize="32" type="uint32"/>
\\ <reg name="sp" bitsize="32" type="data_ptr"/>
\\ <reg name="lr" bitsize="32"/>
\\ <reg name="pc" bitsize="32" type="code_ptr"/>
\\
\\ <reg name="cpsr" bitsize="32" regnum="25"/>
\\ </feature>
\\</target>
;
const memory_map: []const u8 =
\\ <memory-map version="1.0">
\\ <memory type="rom" start="0x00000000" length="0x00004000"/>
\\ <memory type="ram" start="0x02000000" length="0x00040000"/>
\\ <memory type="ram" start="0x03000000" length="0x00008000"/>
\\ <memory type="ram" start="0x04000000" length="0x00000400"/>
\\ <memory type="ram" start="0x05000000" length="0x00000400"/>
\\ <memory type="ram" start="0x06000000" length="0x00018000"/>
\\ <memory type="ram" start="0x07000000" length="0x00000400"/>
\\ <memory type="rom" start="0x08000000" length="0x02000000"/>
\\ <memory type="rom" start="0x0A000000" length="0x02000000"/>
\\ <memory type="rom" start="0x0C000000" length="0x02000000"/>
\\ </memory-map>
;
r: [16]u32 = [_]u32{0} ** 16,
pub fn interface(self: *@This(), allocator: Allocator) Emulator {
@@ -57,13 +100,16 @@ test Server {
}
}.inner;
var server = try Server.init(iface);
var server = try Server.init(
iface,
.{ .target = BarebonesEmulator.target, .memory_map = BarebonesEmulator.memory_map },
);
defer server.deinit(allocator);
const t = try std.Thread.spawn(.{}, clientFn, .{server.socket.listen_address});
defer t.join();
var should_quit = std.atomic.Atomic(bool).init(false);
var should_quit = std.atomic.Value(bool).init(false);
try server.run(std.testing.allocator, &should_quit);
}