tmp: clean up nds7/nds9 io for a bit
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6518fcc68b
commit
78eea74515
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@ -20,21 +20,19 @@ pub const Io = struct {
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pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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return switch (T) {
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// zig fmt: off
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u32 =>
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@as(T, read(bus, u8, address + 3)) << 24
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| @as(T, read(bus, u8, address + 2)) << 16
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| @as(T, read(bus, u8, address + 1)) << 8
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| read(bus, u8, address + 0) << 0,
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// zig fmt: on
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u16 => @as(T, read(bus, u8, address + 1)) << 8 | read(bus, u8, address),
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u32 => switch (address) {
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0x0400_0208 => @intFromBool(bus.io.shared.ime),
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0x0400_0210 => bus.io.shared.ie,
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0x0400_0214 => bus.io.shared.irq,
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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u16 => switch (address) {
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0x0400_0180 => @truncate(bus.io.shared.ipc_sync.raw),
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0x0400_0184 => @truncate(bus.io.shared.ipc_fifo_cnt.raw),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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u8 => switch (address) {
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0x0400_0180...0x0400_0183 => valueAtAddressOffset(u32, address, bus.io.shared.ipc_sync.raw),
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0x0400_0184...0x0400_0187 => valueAtAddressOffset(u32, address, bus.io.shared.ipc_fifo_cnt.raw),
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0x0400_0208...0x0400_020B => valueAtAddressOffset(u32, address, @intFromBool(bus.io.shared.ime)),
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else => warn("unexpected read: 0x{X:0>8}", .{address}),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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else => @compileError(T ++ " is an unsupported bus read type"),
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};
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@ -42,24 +40,19 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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switch (T) {
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u32 => {
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write(bus, u8, address + 3, @as(u8, @truncate(value >> 24)));
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write(bus, u8, address + 2, @as(u8, @truncate(value >> 16)));
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write(bus, u8, address + 1, @as(u8, @truncate(value >> 8)));
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write(bus, u8, address + 0, @as(u8, @truncate(value >> 0)));
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u32 => switch (address) {
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0x0400_0208 => bus.io.shared.ime = value & 1 == 1,
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0x0400_0210 => bus.io.shared.ie = value,
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0x0400_0214 => bus.io.shared.irq = value,
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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u16 => {
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write(bus, u8, address + 1, @as(u8, @truncate(value >> 8)));
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write(bus, u8, address + 0, @as(u8, @truncate(value >> 0)));
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u16 => switch (address) {
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0x0400_0180 => bus.io.shared.ipc_sync.raw = value,
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0x0400_0184 => bus.io.shared.ipc_fifo_cnt.raw = value,
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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u8 => switch (address) {
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0x0400_0180...0x0400_0183 => writeToAddressOffset(&bus.io.shared.ipc_sync.raw, address, value),
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0x0400_0184...0x0400_0187 => writeToAddressOffset(&bus.io.shared.ipc_fifo_cnt.raw, address, value),
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0x0400_0208 => bus.io.shared.ime = value & 1 == 1,
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0x0400_0209...0x0400_020B => {}, // unused bytes from IME
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else => log.warn("unexpected write: 0x{X:}u8 -> 0x{X:0>8}", .{ value, address }),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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else => @compileError(T ++ " is an unsupported bus write type"),
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}
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@ -27,26 +27,22 @@ pub const Io = struct {
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pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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return switch (T) {
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// zig fmt: off
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u32 =>
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@as(T, read(bus, u8, address + 3)) << 24
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| @as(T, read(bus, u8, address + 2)) << 16
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| @as(T, read(bus, u8, address + 1)) << 8
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| read(bus, u8, address + 0) << 0,
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// zig fmt: on
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u16 => @as(T, read(bus, u8, address + 1)) << 8 | read(bus, u8, address),
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u32 => switch (address) {
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0x0400_0208 => @intFromBool(bus.io.shared.ime),
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0x0400_0210 => bus.io.shared.ie,
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0x0400_0214 => bus.io.shared.irq,
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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u16 => switch (address) {
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0x0400_0004 => bus.ppu.io.dispstat.raw,
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0x0400_0130 => bus.io.keyinput.load(.Monotonic),
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0x0400_0180 => @truncate(bus.io.shared.ipc_sync.raw),
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0x0400_0184 => @truncate(bus.io.shared.ipc_fifo_cnt.raw),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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u8 => switch (address) {
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0x0400_0000...0x0400_0003 => valueAtAddressOffset(u32, address, bus.ppu.io.dispcnt_a.raw),
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0x0400_0004...0x0400_0005 => valueAtAddressOffset(u16, address, bus.ppu.io.dispstat.raw),
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0x0400_0130...0x0400_0131 => valueAtAddressOffset(u16, address, bus.io.keyinput.load(.Monotonic)),
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0x0400_0180...0x0400_0183 => valueAtAddressOffset(u32, address, bus.io.shared.ipc_sync.raw),
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0x0400_0184...0x0400_0187 => valueAtAddressOffset(u32, address, bus.io.shared.ipc_fifo_cnt.raw),
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0x0400_0208...0x0400_020B => valueAtAddressOffset(u32, address, @intFromBool(bus.io.shared.ime)),
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0x0400_0304...0x0400_0307 => valueAtAddressOffset(u32, address, bus.io.powcnt.raw),
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else => warn("unexpected read: 0x{X:0>8}", .{address}),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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else => @compileError(T ++ " is an unsupported bus read type"),
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};
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@ -54,32 +50,41 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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switch (T) {
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u32 => {
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write(bus, u8, address + 3, @as(u8, @truncate(value >> 24)));
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write(bus, u8, address + 2, @as(u8, @truncate(value >> 16)));
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write(bus, u8, address + 1, @as(u8, @truncate(value >> 8)));
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write(bus, u8, address + 0, @as(u8, @truncate(value >> 0)));
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},
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u16 => {
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write(bus, u8, address + 1, @as(u8, @truncate(value >> 8)));
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write(bus, u8, address + 0, @as(u8, @truncate(value >> 0)));
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},
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u8 => switch (address) {
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0x0400_0000...0x0400_0003 => writeToAddressOffset(&bus.ppu.io.dispcnt_a.raw, address, value),
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u32 => switch (address) {
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0x0400_0000 => bus.ppu.io.dispcnt_a.raw = value,
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0x0400_0180 => bus.io.shared.ipc_sync.raw = value,
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0x0400_0184 => bus.io.shared.ipc_fifo_cnt.raw = value,
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0x0400_0188 => bus.io.shared.ipc_fifo_send = value,
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0x0400_0180...0x0400_0183 => writeToAddressOffset(&bus.io.shared.ipc_sync.raw, address, value),
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0x0400_0184...0x0400_0187 => writeToAddressOffset(&bus.io.shared.ipc_fifo_cnt.raw, address, value),
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0x0400_0240 => {
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bus.ppu.io.vramcnt_a.raw = @truncate(value >> 0); // 0x0400_0240
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bus.ppu.io.vramcnt_b.raw = @truncate(value >> 8); // 0x0400_0241
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bus.ppu.io.vramcnt_c.raw = @truncate(value >> 16); // 0x0400_0242
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bus.ppu.io.vramcnt_d.raw = @truncate(value >> 24); // 0x0400_0243
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},
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0x0400_0208 => bus.io.shared.ime = value & 1 == 1,
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0x0400_0209...0x0400_020B => {}, // unused bytes from IME
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0x0400_0210 => bus.io.shared.ie = value,
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0x0400_0214 => bus.io.shared.irq = value,
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0x0400_0304 => bus.io.powcnt.raw = value,
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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u16 => switch (address) {
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0x0400_0180 => bus.io.shared.ipc_sync.raw = value,
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0x0400_0184 => bus.io.shared.ipc_fifo_cnt.raw = value,
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0x0400_0208 => bus.io.shared.ime = value & 1 == 1,
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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u8 => switch (address) {
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0x0400_0240 => bus.ppu.io.vramcnt_a.raw = value,
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0x0400_0241 => bus.ppu.io.vramcnt_b.raw = value,
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0x0400_0242 => bus.ppu.io.vramcnt_c.raw = value,
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0x0400_0243 => bus.ppu.io.vramcnt_d.raw = value,
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0x0400_0304...0x0400_0307 => writeToAddressOffset(&bus.io.powcnt.raw, address, value),
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else => log.warn("unexpected write: 0x{X:}u8 -> 0x{X:0>8}", .{ value, address }),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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else => @compileError(T ++ " is an unsupported bus write type"),
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}
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