paoda
/
turbo
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

chore: remove unnecesary gdb.zig file

This commit is contained in:
Rekai Nyangadzayi Musuka 2024-01-12 11:21:14 -06:00
parent 117a95d3a9
commit 62db837442
3 changed files with 70 additions and 92 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/arm32

@ -1 +1 @@
Subproject commit 580e7baca962dd73815bb4717db05b83d55fd58e Subproject commit bdc4bfc6423f173e28d1ee8a4608d0d90e1da3f3

118
src/core/emu.zig
View File

@ -452,71 +452,91 @@ pub const debug = struct {
; ;
}; };
// FIXME: for now, assume ARM7 pub fn Wrapper(comptime proc: System.Process) type {
pub const Wrapper = struct { return struct {
system: System, system: System,
scheduler: *Scheduler, scheduler: *Scheduler,
pub fn init(system: System, scheduler: *Scheduler) @This() { pub fn init(system: System, scheduler: *Scheduler) @This() {
return .{ .system = system, .scheduler = scheduler }; return .{ .system = system, .scheduler = scheduler };
} }
pub fn interface(self: *@This(), allocator: Allocator) Interface { pub fn interface(self: *@This(), allocator: Allocator) Interface {
return Interface.init(allocator, self); return Interface.init(allocator, self);
} }
// FIXME: What about ICTM? DTCM? pub fn read(self: *const @This(), addr: u32) u8 {
pub fn read(self: *const @This(), addr: u32) u8 { const arm = switch (proc) {
return self.system.bus7.dbgRead(u8, addr); .nds7 => self.system.arm7tdmi,
} .nds9 => self.system.arm946es,
};
pub fn write(self: *@This(), addr: u32, value: u8) void { return arm.dbgRead(u8, addr);
self.system.bus7.dbgWrite(u8, addr, value); }
}
pub fn registers(self: *const @This()) *[16]u32 { pub fn write(self: *@This(), addr: u32, value: u8) void {
return &self.system.arm7tdmi.r; const arm = switch (proc) {
} .nds7 => self.system.arm7tdmi,
.nds9 => self.system.arm946es,
};
pub fn cpsr(self: *const @This()) u32 { return arm.dbgWrite(u8, addr, value);
return self.system.arm7tdmi.cpsr.raw; }
}
pub fn step(self: *@This()) void { pub fn registers(self: *const @This()) *[16]u32 {
const scheduler = self.scheduler; const arm = switch (proc) {
const system = self.system; .nds7 => self.system.arm7tdmi,
.nds9 => self.system.arm946es,
};
var did_step: bool = false; return &arm.r;
}
// TODO: keep in lockstep with runFrame pub fn cpsr(self: *const @This()) u32 {
while (true) { const arm = switch (proc) {
if (did_step) break; .nds7 => self.system.arm7tdmi,
.nds9 => self.system.arm946es,
};
switch (isHalted(system)) { return arm.cpsr.raw;
.both => scheduler.tick = scheduler.peekTimestamp(), }
inline else => |halt| {
if (!dma9.step(system.arm946es) and comptime halt != .arm9) {
system.arm946es.step();
system.arm946es.step();
}
if (!dma7.step(system.arm7tdmi) and comptime halt != .arm7) { pub fn step(self: *@This()) void {
system.arm7tdmi.step(); const scheduler = self.scheduler;
did_step = true; const system = self.system;
}
},
}
if (scheduler.check()) |ev| { var did_step: bool = false;
const late = scheduler.tick - ev.tick;
scheduler.handle(system, ev, late); // TODO: keep in lockstep with runFrame
while (true) {
if (did_step) break;
switch (isHalted(system)) {
.both => scheduler.tick = scheduler.peekTimestamp(),
inline else => |halt| {
if (!dma9.step(system.arm946es) and comptime halt != .arm9) {
system.arm946es.step();
system.arm946es.step();
}
if (!dma7.step(system.arm7tdmi) and comptime halt != .arm7) {
system.arm7tdmi.step();
did_step = true;
}
},
}
if (scheduler.check()) |ev| {
const late = scheduler.tick - ev.tick;
scheduler.handle(system, ev, late);
}
} }
} }
} };
}; }
pub fn run(allocator: Allocator, system: System, scheduler: *Scheduler, should_quit: *AtomicBool) !void { pub fn run(allocator: Allocator, system: System, scheduler: *Scheduler, should_quit: *AtomicBool) !void {
var wrapper = Wrapper.init(system, scheduler); var wrapper = Wrapper(.nds7).init(system, scheduler);
var emu_interface = wrapper.interface(allocator); var emu_interface = wrapper.interface(allocator);
defer emu_interface.deinit(); defer emu_interface.deinit();

42
src/gdb.zig
View File

@ -1,42 +0,0 @@
const std = @import("std");
const Server = @import("gdbstub").Server;
const Interface = @import("gdbstub").Emulator;
const System = @import("core/emu.zig").System;
const Scheduler = @import("core/Scheduler.zig");
const Allocator = std.mem.Allocator;
pub const TurboWrapper = struct {
system: System,
scheduler: *Scheduler,
pub fn init(system: System, scheduler: *Scheduler) @This() {
return .{ .system = system, .scheduler = scheduler };
}
pub fn interface(self: *@This(), allocator: Allocator) Interface {
return Interface.init(allocator, self);
}
pub fn read(self: *const @This(), addr: u32) u8 {
return self.cpu.bus.dbgRead(u8, addr);
}
pub fn write(self: *@This(), addr: u32, value: u8) void {
self.cpu.bus.dbgWrite(u8, addr, value);
}
pub fn registers(self: *const @This()) *[16]u32 {
return &self.cpu.r;
}
pub fn cpsr(self: *const @This()) u32 {
return self.cpu.cpsr.raw;
}
pub fn step(self: *@This()) void {
_ = self;
@panic("TODO: Handle ARM7 and ARM9 lol");
}
};