chore: remove unnecesary gdb.zig file
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parent
117a95d3a9
commit
62db837442
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@ -1 +1 @@
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Subproject commit 580e7baca962dd73815bb4717db05b83d55fd58e
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Subproject commit bdc4bfc6423f173e28d1ee8a4608d0d90e1da3f3
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@ -452,8 +452,8 @@ pub const debug = struct {
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;
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;
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};
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};
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// FIXME: for now, assume ARM7
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pub fn Wrapper(comptime proc: System.Process) type {
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pub const Wrapper = struct {
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return struct {
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system: System,
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system: System,
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scheduler: *Scheduler,
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scheduler: *Scheduler,
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@ -465,21 +465,40 @@ pub const debug = struct {
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return Interface.init(allocator, self);
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return Interface.init(allocator, self);
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}
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}
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// FIXME: What about ICTM? DTCM?
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pub fn read(self: *const @This(), addr: u32) u8 {
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pub fn read(self: *const @This(), addr: u32) u8 {
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return self.system.bus7.dbgRead(u8, addr);
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const arm = switch (proc) {
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.nds7 => self.system.arm7tdmi,
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.nds9 => self.system.arm946es,
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};
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return arm.dbgRead(u8, addr);
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}
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}
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pub fn write(self: *@This(), addr: u32, value: u8) void {
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pub fn write(self: *@This(), addr: u32, value: u8) void {
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self.system.bus7.dbgWrite(u8, addr, value);
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const arm = switch (proc) {
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.nds7 => self.system.arm7tdmi,
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.nds9 => self.system.arm946es,
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};
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return arm.dbgWrite(u8, addr, value);
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}
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}
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pub fn registers(self: *const @This()) *[16]u32 {
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pub fn registers(self: *const @This()) *[16]u32 {
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return &self.system.arm7tdmi.r;
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const arm = switch (proc) {
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.nds7 => self.system.arm7tdmi,
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.nds9 => self.system.arm946es,
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};
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return &arm.r;
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}
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}
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pub fn cpsr(self: *const @This()) u32 {
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pub fn cpsr(self: *const @This()) u32 {
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return self.system.arm7tdmi.cpsr.raw;
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const arm = switch (proc) {
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.nds7 => self.system.arm7tdmi,
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.nds9 => self.system.arm946es,
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};
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return arm.cpsr.raw;
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}
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}
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pub fn step(self: *@This()) void {
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pub fn step(self: *@This()) void {
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@ -514,9 +533,10 @@ pub const debug = struct {
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}
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}
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}
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}
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};
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};
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}
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pub fn run(allocator: Allocator, system: System, scheduler: *Scheduler, should_quit: *AtomicBool) !void {
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pub fn run(allocator: Allocator, system: System, scheduler: *Scheduler, should_quit: *AtomicBool) !void {
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var wrapper = Wrapper.init(system, scheduler);
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var wrapper = Wrapper(.nds7).init(system, scheduler);
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var emu_interface = wrapper.interface(allocator);
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var emu_interface = wrapper.interface(allocator);
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defer emu_interface.deinit();
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defer emu_interface.deinit();
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42
src/gdb.zig
42
src/gdb.zig
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@ -1,42 +0,0 @@
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const std = @import("std");
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const Server = @import("gdbstub").Server;
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const Interface = @import("gdbstub").Emulator;
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const System = @import("core/emu.zig").System;
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const Scheduler = @import("core/Scheduler.zig");
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const Allocator = std.mem.Allocator;
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pub const TurboWrapper = struct {
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system: System,
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scheduler: *Scheduler,
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pub fn init(system: System, scheduler: *Scheduler) @This() {
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return .{ .system = system, .scheduler = scheduler };
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}
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pub fn interface(self: *@This(), allocator: Allocator) Interface {
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return Interface.init(allocator, self);
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}
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pub fn read(self: *const @This(), addr: u32) u8 {
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return self.cpu.bus.dbgRead(u8, addr);
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}
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pub fn write(self: *@This(), addr: u32, value: u8) void {
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self.cpu.bus.dbgWrite(u8, addr, value);
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}
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pub fn registers(self: *const @This()) *[16]u32 {
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return &self.cpu.r;
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}
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pub fn cpsr(self: *const @This()) u32 {
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return self.cpu.cpsr.raw;
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}
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pub fn step(self: *@This()) void {
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_ = self;
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@panic("TODO: Handle ARM7 and ARM9 lol");
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}
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};
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