feat: implement broken IPCFIFO
This commit is contained in:
parent
78eea74515
commit
5dbd681ba1
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@ -1 +1 @@
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Subproject commit 30cf951d2a4ccba3ff7ce70ceeae44780af5f1a1
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Subproject commit a3eefa643268617d10e47ca972c4ba5bd05f131e
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@ -70,25 +70,6 @@ const arm9_clock = bus_clock * 2;
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pub fn runFrame(nds7_group: nds7.Group, nds9_group: nds9.Group) void {
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pub fn runFrame(nds7_group: nds7.Group, nds9_group: nds9.Group) void {
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// TODO: might be more efficient to run them both in the same loop?
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// TODO: might be more efficient to run them both in the same loop?
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{
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const scheduler = nds7_group.scheduler;
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const cycles_per_dot = arm7_clock / dot_clock + 1;
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comptime std.debug.assert(cycles_per_dot == 6);
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const cycles_per_frame = 355 * 263 * cycles_per_dot;
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const frame_end = scheduler.tick + cycles_per_frame;
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const cpu = nds7_group.cpu;
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const bus = nds7_group.bus;
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while (scheduler.tick < frame_end) {
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cpu.step();
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if (scheduler.tick >= scheduler.next()) scheduler.handle(bus);
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}
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}
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{
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{
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const scheduler = nds9_group.scheduler;
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const scheduler = nds9_group.scheduler;
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@ -107,6 +88,25 @@ pub fn runFrame(nds7_group: nds7.Group, nds9_group: nds9.Group) void {
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if (scheduler.tick >= scheduler.next()) scheduler.handle(bus);
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if (scheduler.tick >= scheduler.next()) scheduler.handle(bus);
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}
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}
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}
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}
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{
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const scheduler = nds7_group.scheduler;
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const cycles_per_dot = arm7_clock / dot_clock + 1;
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comptime std.debug.assert(cycles_per_dot == 6);
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const cycles_per_frame = 355 * 263 * cycles_per_dot;
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const frame_end = scheduler.tick + cycles_per_frame;
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const cpu = nds7_group.cpu;
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const bus = nds7_group.bus;
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while (scheduler.tick < frame_end) {
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cpu.step();
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if (scheduler.tick >= scheduler.next()) scheduler.handle(bus);
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}
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}
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}
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}
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// FIXME: Perf win to allocating on the stack instead?
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// FIXME: Perf win to allocating on the stack instead?
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126
src/core/io.zig
126
src/core/io.zig
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@ -22,21 +22,8 @@ pub const Io = struct {
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/// Caller must cast the `u32` to either `nds7.IntRequest` or `nds9.IntRequest`
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/// Caller must cast the `u32` to either `nds7.IntRequest` or `nds9.IntRequest`
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irq: u32 = 0x0000_0000,
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irq: u32 = 0x0000_0000,
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/// IPC Synchronize
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/// Inter Process Communication FIFO
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/// Read/Write
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ipc_fifo: IpcFifo = .{},
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ipc_sync: IpcSync = .{ .raw = 0x0000_0000 },
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/// IPC Fifo Control
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/// Read/Write
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ipc_fifo_cnt: IpcFifoCnt = .{ .raw = 0x0000_0000 },
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/// IPC Send FIFO
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/// Write-Only
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ipc_fifo_send: u32 = 0x0000_0000,
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/// IPC Receive FIFO
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/// Read-Only
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ipc_fifo_recv: u32 = 0x0000_0000,
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/// Post Boot Flag
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/// Post Boot Flag
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/// Read/Write
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/// Read/Write
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@ -121,6 +108,54 @@ pub inline fn writeToAddressOffset(
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};
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};
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}
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}
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const IpcFifo = struct {
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const Sync = IpcSync;
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const Control = IpcFifoCnt;
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/// IPC Synchronize
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/// Read/Write
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sync: Sync = .{ .raw = 0x0000_0000 },
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/// IPC Fifo Control
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/// Read/Write
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cnt: Control = .{ .raw = 0x0000_0000 },
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fifo: [2]Fifo = .{ Fifo{}, Fifo{} },
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const Source = enum { arm7, arm9 };
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/// IPC Send FIFO
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/// Write-Only
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pub fn send(self: *@This(), comptime src: Source, value: u32) !void {
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const idx = switch (src) {
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.arm7 => 0,
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.arm9 => 1,
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};
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if (!self.cnt.enable_fifos.read()) return;
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try self.fifo[idx].push(value);
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}
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/// IPC Receive FIFO
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/// Read-Only
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pub fn recv(self: *@This(), comptime src: Source) u32 {
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const idx = switch (src) {
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.arm7 => 1, // switched around on purpose
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.arm9 => 0,
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};
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const enabled = self.cnt.enable_fifos.read();
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const val_opt = if (enabled) self.fifo[idx].pop() else self.fifo[idx].peek();
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return val_opt orelse blk: {
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self.cnt.send_fifo_empty.set();
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break :blk 0x0000_0000;
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};
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}
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};
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const IpcSync = extern union {
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const IpcSync = extern union {
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/// Data input to IPCSYNC Bit 8->11 of remote CPU
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/// Data input to IPCSYNC Bit 8->11 of remote CPU
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/// Read-Only
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/// Read-Only
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@ -187,3 +222,64 @@ pub const nds9 = struct {
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pub const PostFlag = enum(u8) { in_progress = 0, completed };
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pub const PostFlag = enum(u8) { in_progress = 0, completed };
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};
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};
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const Fifo = struct {
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const Index = u8;
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const Error = error{full};
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const len = 0x10;
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read_idx: Index = 0,
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write_idx: Index = 0,
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buf: [len]u32 = [_]u32{undefined} ** len,
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comptime {
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const max_capacity = (@as(Index, 1) << @typeInfo(Index).Int.bits - 1) - 1; // half the range of index type
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std.debug.assert(std.math.isPowerOfTwo(len));
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std.debug.assert(len <= max_capacity);
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}
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pub fn reset(self: *@This()) void {
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self.read_idx = 0;
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self.write_idx = 0;
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}
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pub fn push(self: *@This(), value: u32) Error!void {
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if (self.isFull()) return Error.full;
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defer self.write_idx += 1;
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self.buf[self.mask(self.write_idx)] = value;
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}
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pub fn pop(self: *@This()) ?u32 {
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if (self.isEmpty()) return null;
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defer self.read_idx += 1;
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return self.buf[self.mask(self.read_idx)];
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}
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pub fn peek(self: *const @This()) ?u32 {
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if (self.isEmpty()) return null;
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return self.buf[self.mask(self.read_idx)];
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}
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fn _len(self: *const @This()) Index {
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return self.write_idx - self.read_idx;
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}
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fn isFull(self: *const @This()) bool {
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return self._len() == self.buf.len;
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}
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fn isEmpty(self: *const @This()) bool {
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return self.read_idx == self.write_idx;
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}
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inline fn mask(self: *const @This(), idx: Index) Index {
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const _mask: Index = @intCast(self.buf.len - 1);
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return idx & _mask;
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}
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};
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@ -24,11 +24,13 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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0x0400_0208 => @intFromBool(bus.io.shared.ime),
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0x0400_0208 => @intFromBool(bus.io.shared.ime),
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0x0400_0210 => bus.io.shared.ie,
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0x0400_0210 => bus.io.shared.ie,
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0x0400_0214 => bus.io.shared.irq,
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0x0400_0214 => bus.io.shared.irq,
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0x0410_0000 => bus.io.shared.ipc_fifo.recv(.arm7),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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},
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u16 => switch (address) {
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u16 => switch (address) {
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0x0400_0180 => @truncate(bus.io.shared.ipc_sync.raw),
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0x0400_0180 => @truncate(bus.io.shared.ipc_fifo.sync.raw),
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0x0400_0184 => @truncate(bus.io.shared.ipc_fifo_cnt.raw),
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0x0400_0184 => @truncate(bus.io.shared.ipc_fifo.cnt.raw),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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},
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u8 => switch (address) {
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u8 => switch (address) {
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@ -44,11 +46,18 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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0x0400_0208 => bus.io.shared.ime = value & 1 == 1,
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0x0400_0208 => bus.io.shared.ime = value & 1 == 1,
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0x0400_0210 => bus.io.shared.ie = value,
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0x0400_0210 => bus.io.shared.ie = value,
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0x0400_0214 => bus.io.shared.irq = value,
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0x0400_0214 => bus.io.shared.irq = value,
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0x0400_0188 => bus.io.shared.ipc_fifo.send(.arm7, value) catch |e| std.debug.panic("FIFO error: {}", .{e}),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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},
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u16 => switch (address) {
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u16 => switch (address) {
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0x0400_0180 => bus.io.shared.ipc_sync.raw = value,
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0x0400_0180 => bus.io.shared.ipc_fifo.sync.raw = blk: {
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0x0400_0184 => bus.io.shared.ipc_fifo_cnt.raw = value,
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const ret = value & ~@as(u16, 0xF) | (bus.io.shared.ipc_fifo.sync.raw & 0xF);
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log.debug("IPCFIFOSYNC <- 0x{X:0>8}", .{ret});
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break :blk ret;
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},
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0x0400_0184 => bus.io.shared.ipc_fifo.cnt.raw = value,
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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},
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u8 => switch (address) {
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u8 => switch (address) {
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@ -31,14 +31,16 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
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0x0400_0208 => @intFromBool(bus.io.shared.ime),
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0x0400_0208 => @intFromBool(bus.io.shared.ime),
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0x0400_0210 => bus.io.shared.ie,
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0x0400_0210 => bus.io.shared.ie,
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0x0400_0214 => bus.io.shared.irq,
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0x0400_0214 => bus.io.shared.irq,
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0x0410_0000 => bus.io.shared.ipc_fifo.recv(.arm9),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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},
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u16 => switch (address) {
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u16 => switch (address) {
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0x0400_0004 => bus.ppu.io.dispstat.raw,
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0x0400_0004 => bus.ppu.io.dispstat.raw,
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0x0400_0130 => bus.io.keyinput.load(.Monotonic),
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0x0400_0130 => bus.io.keyinput.load(.Monotonic),
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0x0400_0180 => @truncate(bus.io.shared.ipc_sync.raw),
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0x0400_0180 => @truncate(bus.io.shared.ipc_fifo.sync.raw),
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0x0400_0184 => @truncate(bus.io.shared.ipc_fifo_cnt.raw),
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0x0400_0184 => @truncate(bus.io.shared.ipc_fifo.cnt.raw),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
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},
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},
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u8 => switch (address) {
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u8 => switch (address) {
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@ -52,9 +54,14 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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switch (T) {
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switch (T) {
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u32 => switch (address) {
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u32 => switch (address) {
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0x0400_0000 => bus.ppu.io.dispcnt_a.raw = value,
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0x0400_0000 => bus.ppu.io.dispcnt_a.raw = value,
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0x0400_0180 => bus.io.shared.ipc_sync.raw = value,
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0x0400_0180 => bus.io.shared.ipc_fifo.sync.raw = blk: {
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0x0400_0184 => bus.io.shared.ipc_fifo_cnt.raw = value,
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const ret = value & ~@as(u32, 0xF) | (bus.io.shared.ipc_fifo.sync.raw & 0xF);
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0x0400_0188 => bus.io.shared.ipc_fifo_send = value,
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log.debug("IPCFIFOSYNC <- 0x{X:0>8}", .{ret});
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break :blk ret;
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},
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0x0400_0184 => bus.io.shared.ipc_fifo.cnt.raw = value,
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0x0400_0188 => bus.io.shared.ipc_fifo.send(.arm9, value) catch |e| std.debug.panic("IPC FIFO Error: {}", .{e}),
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0x0400_0240 => {
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0x0400_0240 => {
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bus.ppu.io.vramcnt_a.raw = @truncate(value >> 0); // 0x0400_0240
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bus.ppu.io.vramcnt_a.raw = @truncate(value >> 0); // 0x0400_0240
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@ -72,8 +79,13 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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},
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},
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u16 => switch (address) {
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u16 => switch (address) {
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0x0400_0180 => bus.io.shared.ipc_sync.raw = value,
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0x0400_0180 => bus.io.shared.ipc_fifo.sync.raw = blk: {
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0x0400_0184 => bus.io.shared.ipc_fifo_cnt.raw = value,
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const ret = value & ~@as(u16, 0xF) | (bus.io.shared.ipc_fifo.sync.raw & 0xF);
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log.debug("IPCFIFOSYNC <- 0x{X:0>8}", .{ret});
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break :blk ret;
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},
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0x0400_0184 => bus.io.shared.ipc_fifo.cnt.raw = value,
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0x0400_0208 => bus.io.shared.ime = value & 1 == 1,
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0x0400_0208 => bus.io.shared.ime = value & 1 == 1,
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
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