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fix: create and draw ui even when running in gdb mode

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This commit is contained in:
Rekai Nyangadzayi Musuka
2024-02-18 01:12:42 -06:00
parent 422e0d00b8
commit 2afd6dbf9e
7 changed files with 219 additions and 123 deletions
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35
src/core/emu.zig
View File

@@ -2,6 +2,7 @@ const std = @import("std");
const Header = @import("cartridge.zig").Header;
const Scheduler = @import("Scheduler.zig");
const Ui = @import("../platform.zig").Ui;
const Allocator = std.mem.Allocator;
@@ -404,6 +405,16 @@ pub fn fastBoot(system: System) void {
}
}
pub const Sync = struct {
const Atomic = std.atomic.Value;
should_quit: Atomic(bool) = Atomic(bool).init(false),
pub fn init(self: *Sync) void {
self.* = .{};
}
};
pub const debug = struct {
const Interface = @import("gdbstub").Emulator;
const Server = @import("gdbstub").Server;
@@ -457,6 +468,8 @@ pub const debug = struct {
system: System,
scheduler: *Scheduler,
tick: u64 = 0,
pub fn init(system: System, scheduler: *Scheduler) @This() {
return .{ .system = system, .scheduler = scheduler };
}
@@ -516,12 +529,20 @@ pub const debug = struct {
inline else => |halt| {
if (!dma9.step(system.arm946es) and comptime halt != .arm9) {
system.arm946es.step();
system.arm946es.step();
switch (proc) {
.nds9 => did_step = true,
.nds7 => system.arm946es.step(),
}
}
if (!dma7.step(system.arm7tdmi) and comptime halt != .arm7) {
system.arm7tdmi.step();
did_step = true;
if (proc == .nds7 or self.tick % 2 == 0) system.arm7tdmi.step();
if (proc == .nds7) {
did_step = true;
self.tick += 1;
}
}
},
}
@@ -535,8 +556,8 @@ pub const debug = struct {
};
}
pub fn run(allocator: Allocator, system: System, scheduler: *Scheduler, should_quit: *AtomicBool) !void {
var wrapper = Wrapper(.nds7).init(system, scheduler);
pub fn run(allocator: Allocator, ui: *Ui, scheduler: *Scheduler, system: System, sync: *Sync) !void {
var wrapper = Wrapper(.nds9).init(system, scheduler);
var emu_interface = wrapper.interface(allocator);
defer emu_interface.deinit();
@@ -544,7 +565,9 @@ pub const debug = struct {
var server = try Server.init(emu_interface, .{ .target = nds7.target, .memory_map = nds7.memory_map });
defer server.deinit(allocator);
const thread = try std.Thread.spawn(.{}, Server.run, .{ &server, allocator, should_quit });
const thread = try std.Thread.spawn(.{}, Server.run, .{ &server, allocator, &sync.should_quit });
defer thread.join();
try ui.debug_run(scheduler, system, sync);
}
};

4
src/core/nds7/Bus.zig
View File

@@ -71,7 +71,7 @@ fn _read(self: *@This(), comptime T: type, comptime mode: Mode, address: u32) T
}
return switch (aligned_addr) {
0x0000_0000...0x01FF_FFFF => self.bios.read(T, address),
0x0000_0000...0x01FF_FFFF => self.bios.read(T, aligned_addr),
0x0200_0000...0x02FF_FFFF => std.mem.readInt(T, self.main[aligned_addr & 0x003F_FFFF ..][0..byte_count], .little),
0x0300_0000...0x037F_FFFF => switch (self.io.shr.wramcnt.mode.read()) {
0b00 => std.mem.readInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count], .little),
@@ -105,7 +105,7 @@ fn _write(self: *@This(), comptime T: type, comptime mode: Mode, address: u32, v
}
switch (aligned_addr) {
0x0000_0000...0x01FF_FFFF => self.bios.write(T, address, value),
0x0000_0000...0x01FF_FFFF => self.bios.write(T, aligned_addr, value),
0x0200_0000...0x02FF_FFFF => std.mem.writeInt(T, self.main[aligned_addr & 0x003F_FFFF ..][0..byte_count], value, .little),
0x0300_0000...0x037F_FFFF => switch (self.io.shr.wramcnt.mode.read()) {
0b00 => std.mem.writeInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count], value, .little),

4
src/core/nds9/Bus.zig
View File

@@ -81,7 +81,7 @@ fn _read(self: *@This(), comptime T: type, comptime mode: Mode, address: u32) T
0x0500_0000...0x05FF_FFFF => std.mem.readInt(T, self.makeshift_palram[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)], .little),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(T, .nds9, aligned_addr),
0x0700_0000...0x07FF_FFFF => std.mem.readInt(T, self.ppu.oam.buf[aligned_addr & (2 * KiB - 1) ..][0..byte_count], .little),
0xFFFF_0000...0xFFFF_FFFF => self.bios.read(T, address),
0xFFFF_0000...0xFFFF_FFFF => self.bios.read(T, aligned_addr),
else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }),
};
}
@@ -111,7 +111,7 @@ fn _write(self: *@This(), comptime T: type, comptime mode: Mode, address: u32, v
0x0500_0000...0x05FF_FFFF => std.mem.writeInt(T, self.makeshift_palram[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)], value, .little),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(T, .nds9, aligned_addr, value),
0x0700_0000...0x07FF_FFFF => std.mem.writeInt(T, self.ppu.oam.buf[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)], value, .little),
0xFFFF_0000...0xFFFF_FFFF => self.bios.write(T, address, value),
0xFFFF_0000...0xFFFF_FFFF => self.bios.write(T, aligned_addr, value),
else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }),
}
}