2023-08-01 20:13:18 +00:00
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const std = @import("std");
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const Header = @import("cartridge.zig").Header;
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2023-09-05 03:22:57 +00:00
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const SharedIo = @import("io.zig").Io;
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2023-09-27 04:25:36 +00:00
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const Scheduler = @import("Scheduler.zig");
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2023-08-01 20:13:18 +00:00
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const Allocator = std.mem.Allocator;
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/// Load a NDS Cartridge
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///
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/// intended to be used immediately after Emulator initialization
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2023-09-27 04:25:36 +00:00
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pub fn load(allocator: Allocator, system: System, rom_file: std.fs.File) ![12]u8 {
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2023-08-01 20:13:18 +00:00
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const log = std.log.scoped(.load_rom);
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const rom_buf = try rom_file.readToEndAlloc(allocator, try rom_file.getEndPos());
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defer allocator.free(rom_buf);
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var stream = std.io.fixedBufferStream(rom_buf);
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const header = try stream.reader().readStruct(Header);
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log.info("Title: \"{s}\"", .{std.mem.sliceTo(&header.title, 0)});
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log.info("Game Code: \"{s}\"", .{std.mem.sliceTo(&header.game_code, 0)});
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log.info("Maker Code: \"{s}\"", .{std.mem.sliceTo(&header.maker_code, 0)});
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// Dealing with the ARM946E-S
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{
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log.debug("ARM9 ROM Offset: 0x{X:0>8}", .{header.arm9_rom_offset});
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log.debug("ARM9 Entry Address: 0x{X:0>8}", .{header.arm9_entry_address});
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log.debug("ARM9 RAM Address: 0x{X:0>8}", .{header.arm9_ram_address});
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log.debug("ARM9 Size: 0x{X:0>8}", .{header.arm9_size});
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// Copy ARM9 Code into Main Memory
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for (rom_buf[header.arm9_rom_offset..][0..header.arm9_size], 0..) |value, i| {
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const address = header.arm9_ram_address + @as(u32, @intCast(i));
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2023-09-27 04:25:36 +00:00
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system.bus9.dbgWrite(u8, address, value);
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2023-08-01 20:13:18 +00:00
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}
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2023-09-27 04:25:36 +00:00
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system.arm946es.r[15] = header.arm9_entry_address;
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2023-08-01 20:13:18 +00:00
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}
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// Dealing with the ARM7TDMI
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{
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log.debug("ARM7 ROM Offset: 0x{X:0>8}", .{header.arm7_rom_offset});
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log.debug("ARM7 Entry Address: 0x{X:0>8}", .{header.arm7_entry_address});
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log.debug("ARM7 RAM Address: 0x{X:0>8}", .{header.arm7_ram_address});
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log.debug("ARM7 Size: 0x{X:0>8}", .{header.arm7_size});
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// Copy ARM7 Code into Main Memory
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for (rom_buf[header.arm7_rom_offset..][0..header.arm7_size], 0..) |value, i| {
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const address = header.arm7_ram_address + @as(u32, @intCast(i));
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2023-09-27 04:25:36 +00:00
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system.bus7.dbgWrite(u8, address, value);
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2023-08-01 20:13:18 +00:00
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}
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2023-09-27 04:25:36 +00:00
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system.arm7tdmi.r[15] = header.arm7_entry_address;
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2023-08-01 20:13:18 +00:00
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}
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return header.title;
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}
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const bus_clock = 33513982; // 33.513982 Hz
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const dot_clock = 5585664; // 5.585664 Hz
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const arm7_clock = bus_clock;
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const arm9_clock = bus_clock * 2;
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2023-09-27 04:25:36 +00:00
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pub fn runFrame(scheduler: *Scheduler, system: System) void {
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const cycles_per_dot = arm9_clock / dot_clock + 1;
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comptime std.debug.assert(cycles_per_dot == 12);
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2023-08-01 20:13:18 +00:00
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2023-09-27 04:25:36 +00:00
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const cycles_per_frame = 355 * 263 * cycles_per_dot;
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const frame_end = scheduler.tick + cycles_per_frame;
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2023-08-01 20:13:18 +00:00
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2023-09-27 04:25:36 +00:00
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while (scheduler.tick < frame_end) {
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system.arm7tdmi.step();
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system.arm946es.step();
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system.arm946es.step();
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2023-08-01 20:13:18 +00:00
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2023-09-27 04:25:36 +00:00
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if (scheduler.check()) |ev| {
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const late = scheduler.tick - ev.tick;
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2023-08-01 20:13:18 +00:00
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2023-09-27 04:25:36 +00:00
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// this is kinda really jank lol
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const bus_ptr: ?*anyopaque = switch (ev.kind) {
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.heat_death => null,
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.nds7 => system.bus7,
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.nds9 => system.bus9,
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};
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2023-08-01 20:13:18 +00:00
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2023-09-27 04:25:36 +00:00
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scheduler.handle(bus_ptr, ev, late);
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2023-08-01 20:13:18 +00:00
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}
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}
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}
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2023-09-05 03:22:57 +00:00
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// FIXME: Perf win to allocating on the stack instead?
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pub const SharedContext = struct {
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const MiB = 0x100000;
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io: *SharedIo,
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main: *[4 * MiB]u8,
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pub fn init(allocator: Allocator) !@This() {
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const ctx = .{
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.io = try allocator.create(SharedIo),
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.main = try allocator.create([4 * MiB]u8),
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};
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ctx.io.* = .{};
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return ctx;
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}
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pub fn deinit(self: @This(), allocator: Allocator) void {
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allocator.destroy(self.io);
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allocator.destroy(self.main);
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}
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};
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2023-09-06 02:39:13 +00:00
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pub inline fn forceAlign(comptime T: type, address: u32) u32 {
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return switch (T) {
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u32 => address & ~@as(u32, 3),
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u16 => address & ~@as(u32, 1),
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u8 => address,
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else => @compileError("Bus: Invalid read/write type"),
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};
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}
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2023-09-27 04:25:36 +00:00
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pub const System = struct {
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pub const Bus7 = @import("nds7/Bus.zig");
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pub const Bus9 = @import("nds9/Bus.zig");
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pub const Cp15 = @import("nds9/Cp15.zig");
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pub const Arm7tdmi = @import("arm32").Arm7tdmi;
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pub const Arm946es = @import("arm32").Arm946es;
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arm7tdmi: *Arm7tdmi,
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arm946es: *Arm946es,
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bus7: *Bus7,
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bus9: *Bus9,
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cp15: *Cp15,
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pub fn deinit(self: @This(), allocator: Allocator) void {
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self.bus7.deinit(allocator);
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self.bus9.deinit(allocator);
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}
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};
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