290 lines
11 KiB
Rust
290 lines
11 KiB
Rust
use super::cartridge::Cartridge;
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use super::high_ram::HighRam;
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use super::instruction::Cycles;
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use super::interrupt::{Interrupt, InterruptFlag};
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use super::ppu::Ppu;
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use super::serial::Serial;
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use super::sound::Sound;
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use super::timer::Timer;
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use super::work_ram::{VariableWorkRam, WorkRam};
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use std::{convert::TryInto, fs::File, io::Read};
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#[derive(Debug, Clone)]
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pub struct Bus {
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boot: Option<[u8; 256]>, // Boot ROM is 256b long
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cartridge: Option<Cartridge>,
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pub ppu: Ppu,
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wram: WorkRam,
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vwram: VariableWorkRam,
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timer: Timer,
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interrupt: Interrupt,
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sound: Sound,
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hram: HighRam,
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serial: Serial,
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}
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impl Default for Bus {
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fn default() -> Self {
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Self {
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boot: None,
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cartridge: None,
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ppu: Default::default(),
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wram: Default::default(),
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vwram: Default::default(),
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timer: Default::default(),
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interrupt: Default::default(),
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sound: Default::default(),
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hram: Default::default(),
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serial: Default::default(),
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}
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}
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}
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impl Bus {
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pub fn with_boot(path: &str) -> Self {
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let mut file = File::open(path).unwrap();
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let mut buf = Vec::with_capacity(256);
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file.read_to_end(&mut buf).unwrap();
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let boot_rom: [u8; 256] = buf.try_into().unwrap();
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Self {
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boot: Some(boot_rom),
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..Default::default()
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}
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}
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pub fn load_cartridge(&mut self, path: &str) {
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self.cartridge = Some(Cartridge::new(path).unwrap());
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}
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pub fn step(&mut self, cycles: Cycles) {
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self.timer.step(cycles);
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self.sound.step(cycles);
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self.ppu.step(cycles);
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}
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}
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impl Bus {
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pub fn read_byte(&self, addr: u16) -> u8 {
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match addr {
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0x0000..=0x3FFF => {
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// 16KB ROM bank 00
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if addr < 0x00FF {
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if let Some(boot) = self.boot {
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return boot[addr as usize];
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}
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}
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match self.cartridge.as_ref() {
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Some(cart) => cart.read_byte(addr),
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None => panic!("Tried to read from a non-existant cartridge"),
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}
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}
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0x4000..=0x7FFF => match self.cartridge.as_ref() {
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// 16KB ROM Bank 01 -> NN (switchable via MB)
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Some(cart) => cart.read_byte(addr),
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None => panic!("Tried to read from a non-existant cartridge"),
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},
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0x8000..=0x9FFF => {
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// 8KB Video RAM
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self.ppu.read_byte(addr)
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}
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0xA000..=0xBFFF => match self.cartridge.as_ref() {
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// 8KB External RAM
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Some(cart) => cart.read_byte(addr),
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None => panic!("Tried to read from the external RAM of a non-existant cartridge"),
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},
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0xC000..=0xCFFF => {
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// 4KB Work RAM Bank 0
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self.wram.read_byte(addr)
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}
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0xD000..=0xDFFF => {
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// 4KB Work RAM Bank 1 -> N
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self.vwram.read_byte(addr)
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}
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0xE000..=0xFDFF => {
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// Mirror of 0xC000 to 0xDDFF
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unimplemented!("Unable to read {:#06X} in Restricted Mirror", addr);
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}
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0xFE00..=0xFE9F => {
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// Sprite Attribute Table
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unimplemented!("Unable to read {:#06X} in the Sprite Attribute Table", addr);
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}
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0xFEA0..=0xFEFF => unimplemented!("{:#06X} is not allowed to be used", addr),
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0xFF00..=0xFF7F => {
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// IO Registers
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match addr {
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0xFF01 => self.serial.next,
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0xFF02 => self.serial.control.into(),
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0xFF07 => self.timer.control.into(),
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0xFF0F => self.interrupt_flag().into(),
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0xFF11 => self.sound.ch1.sound_duty.into(),
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0xFF12 => self.sound.ch1.vol_envelope.into(),
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0xFF14 => self.sound.ch1.freq_hi.into(),
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0xFF24 => self.sound.control.channel.into(),
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0xFF25 => self.sound.control.output.into(),
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0xFF26 => self.sound.control.status.into(),
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0xFF40 => self.ppu.lcd_control.into(),
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0xFF41 => self.ppu.stat.into(),
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0xFF42 => self.ppu.pos.scroll_y,
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0xFF43 => self.ppu.pos.scroll_x,
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0xFF44 => self.ppu.pos.line_y,
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0xFF45 => self.ppu.pos.ly_compare as u8,
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0xFF47 => self.ppu.monochrome.bg_palette.into(),
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0xFF48 => self.ppu.monochrome.obj_palette_0.into(),
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0xFF49 => self.ppu.monochrome.obj_palette_1.into(),
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0xFF4A => self.ppu.pos.window_y,
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0xFF4B => self.ppu.pos.window_x,
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_ => unimplemented!("Unable to read {:#06X} in I/O Registers", addr),
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}
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}
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0xFF80..=0xFFFE => {
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// High RAM
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self.hram.read_byte(addr)
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}
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0xFFFF => {
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// Interrupts Enable Register
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self.interrupt.enable.into()
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}
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}
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}
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pub fn write_byte(&mut self, addr: u16, byte: u8) {
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match addr {
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0x0000..=0x3FFF => {
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// 16KB ROM bank 00
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match self.cartridge.as_mut() {
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Some(cart) => cart.write_byte(addr, byte),
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None => panic!("Tried to write into non-existent Cartridge"),
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}
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}
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0x4000..=0x7FFF => {
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// 16KB ROM Bank 01 -> NN (switchable via MB)
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match self.cartridge.as_mut() {
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Some(cart) => cart.write_byte(addr, byte),
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None => panic!("Tried to write into non-existent Cartridge"),
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}
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}
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0x8000..=0x9FFF => {
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// 8KB Video RAM
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self.ppu.write_byte(addr, byte);
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}
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0xA000..=0xBFFF => {
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// 8KB External RAM
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match self.cartridge.as_mut() {
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Some(cart) => cart.write_byte(addr, byte),
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None => panic!("Tried to write into non-existent Cartridge"),
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}
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}
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0xC000..=0xCFFF => {
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// 4KB Work RAM Bank 0
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self.wram.write_byte(addr, byte);
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}
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0xD000..=0xDFFF => {
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// 4KB Work RAM Bank 1 -> N
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self.vwram.write_byte(addr, byte);
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}
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0xE000..=0xFDFF => {
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// Mirror of 0xC000 to 0xDDFF
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unimplemented!("Unable to write to {:#06X} in Restricted Mirror", addr);
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}
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0xFE00..=0xFE9F => {
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// Sprite Attribute Table
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unimplemented!(
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"Unable to write to {:#06X} in the Sprite Attribute Table",
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addr
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);
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}
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0xFEA0..=0xFEFF => unimplemented!("{:#06X} is not allowed to be used", addr),
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0xFF00..=0xFF7F => {
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// IO Registers
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match addr {
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0xFF01 => self.serial.next = byte,
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0xFF02 => self.serial.control = byte.into(),
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0xFF07 => self.timer.control = byte.into(),
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0xFF0F => self.set_interrupt_flag(byte),
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0xFF11 => self.sound.ch1.sound_duty = byte.into(),
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0xFF12 => self.sound.ch1.vol_envelope = byte.into(),
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0xFF13 => self.sound.ch1.freq_lo = byte.into(),
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0xFF14 => self.sound.ch1.freq_hi = byte.into(),
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0xFF24 => self.sound.control.channel = byte.into(),
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0xFF25 => self.sound.control.output = byte.into(),
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0xFF26 => self.sound.control.status = byte.into(), // FIXME: Should we control which bytes are written to here?
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0xFF40 => self.ppu.lcd_control = byte.into(),
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0xFF41 => self.ppu.stat = byte.into(),
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0xFF42 => self.ppu.pos.scroll_y = byte,
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0xFF43 => self.ppu.pos.scroll_x = byte,
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0xFF44 => self.ppu.pos.line_y = byte,
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0xFF45 => self.ppu.pos.ly_compare = byte == 0x01, // FIXME: We don't consider the possibility of a byte being different form 0x00 or 0x01
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0xFF47 => self.ppu.monochrome.bg_palette = byte.into(),
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0xFF48 => self.ppu.monochrome.obj_palette_0 = byte.into(),
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0xFF49 => self.ppu.monochrome.obj_palette_1 = byte.into(),
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0xFF4A => self.ppu.pos.window_y = byte,
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0xFF4B => self.ppu.pos.window_x = byte,
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0xFF50 => {
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// Disable Boot ROM
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if byte != 0 {
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self.boot = None;
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}
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}
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_ => unimplemented!("Unable to write to {:#06X} in I/O Registers", addr),
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};
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}
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0xFF80..=0xFFFE => {
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// High RAM
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self.hram.write_byte(addr, byte);
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}
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0xFFFF => {
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// Interrupts Enable Register
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self.interrupt.enable = byte.into();
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}
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}
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}
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pub fn read_word(&self, addr: u16) -> u16 {
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(self.read_byte(addr + 1) as u16) << 8 | self.read_byte(addr) as u16
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}
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pub fn write_word(&mut self, addr: u16, word: u16) {
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self.write_byte(addr + 1, (word >> 8) as u8);
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self.write_byte(addr, (word & 0x00FF) as u8);
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}
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}
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impl Bus {
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fn interrupt_flag(&self) -> InterruptFlag {
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// Read the current Interrupt status from the PPU
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let ppu_vblank = self.ppu.interrupt.vblank();
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let ppu_lcd_stat = self.ppu.interrupt.lcd_stat();
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// We actually don't care about what the InterruptFlag currently says
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// about vblank and lcd_stat, because the PPU has the more accurate
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// knowledge about what state these interrupt flags are in.
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// In order to have the PPU be the source of truth
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// (and accounting for the fact that we aren't able to update)
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// the interrupt flag register 0xFF0F in the method, we can
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// mask over those two interruptss
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// Copy the Interrupt Flag register 0xFF0F
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let mut flag = self.interrupt.flag;
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flag.set_vblank(ppu_vblank);
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flag.set_lcd_stat(ppu_lcd_stat);
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flag
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}
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fn set_interrupt_flag(&mut self, byte: u8) {
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// Update the Interrupt register 0xFF0F
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self.interrupt.flag = byte.into();
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let vblank = self.interrupt.flag.vblank();
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let lcd_stat = self.interrupt.flag.lcd_stat();
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// Update the PPU's internal tracking of the interrupt register 0xFF0F
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self.ppu.interrupt.set_vblank(vblank);
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self.ppu.interrupt.set_lcd_stat(lcd_stat);
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}
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}
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