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9964b49ce1
Author | SHA1 | Date |
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Rekai Nyangadzayi Musuka | 9964b49ce1 | |
Rekai Nyangadzayi Musuka | 142231d355 | |
Rekai Nyangadzayi Musuka | 227928e8ca |
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@ -325,7 +325,7 @@ impl Ppu {
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if self.ctrl.window_enabled()
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if self.ctrl.window_enabled()
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&& !self.window_stat.should_draw()
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&& !self.window_stat.should_draw()
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&& self.window_stat.coincidence()
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&& self.window_stat.coincidence()
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&& self.x_pos as i8 as i16 >= self.pos.window_x as i8 as i16 - 7
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&& self.x_pos as i16 >= self.pos.window_x as i16 - 7
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{
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{
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self.window_stat.set_should_draw(true);
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self.window_stat.set_should_draw(true);
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self.fetch.back.reset();
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self.fetch.back.reset();
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@ -700,7 +700,7 @@ impl PixelFetcher {
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let id = self.back.tile.id.expect("Tile Number is present");
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let id = self.back.tile.id.expect("Tile Number is present");
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let tile_data_addr = match control.tile_data_addr() {
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let tile_data_addr = match control.tile_data_addr() {
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TileDataAddress::X8800 => 0x9000u16.wrapping_add(((id as i8 as i16) * 16) as u16),
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TileDataAddress::X8800 => 0x9000u16.wrapping_add((id as i8 as i16 * 16) as u16),
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TileDataAddress::X8000 => 0x8000 + (id as u16 * 16),
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TileDataAddress::X8000 => 0x8000 + (id as u16 * 16),
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};
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};
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31
src/timer.rs
31
src/timer.rs
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@ -21,17 +21,6 @@ impl Timer {
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use State::*;
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use State::*;
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use TimerSpeed::*;
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use TimerSpeed::*;
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match self.state {
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TIMAOverflow(_) | AbortedTIMAOverflow(_) => self.next(),
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LoadTMA => {
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self.counter = self.modulo;
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self.interrupt = true;
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self.next();
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}
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Normal => {}
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}
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self.divider = self.divider.wrapping_add(1);
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self.divider = self.divider.wrapping_add(1);
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// Get Bit Position
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// Get Bit Position
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@ -53,6 +42,17 @@ impl Timer {
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}
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}
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self.and_result = Some(new_result);
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self.and_result = Some(new_result);
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match self.state {
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TIMAOverflow(_) | AbortedTIMAOverflow(_) => self.next(),
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LoadTIMA => {
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self.counter = self.modulo;
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self.interrupt = true;
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self.next();
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}
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Normal => {}
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}
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}
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}
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/// 0xFF05 | TIMA - Timer Counter
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/// 0xFF05 | TIMA - Timer Counter
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@ -70,7 +70,7 @@ impl Timer {
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self.counter = byte;
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self.counter = byte;
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self.state = AbortedTIMAOverflow(step);
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self.state = AbortedTIMAOverflow(step);
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}
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}
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LoadTMA => {}
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LoadTIMA => { /* Ignored */ }
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}
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}
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}
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}
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@ -95,9 +95,8 @@ impl Timer {
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use State::*;
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use State::*;
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self.state = match self.state {
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self.state = match self.state {
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Normal | LoadTMA => Normal,
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Normal | LoadTIMA | AbortedTIMAOverflow(3) => Normal,
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AbortedTIMAOverflow(4) => Normal,
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TIMAOverflow(3) => LoadTIMA,
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TIMAOverflow(4) => LoadTMA,
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AbortedTIMAOverflow(step) => AbortedTIMAOverflow(step + 1),
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AbortedTIMAOverflow(step) => AbortedTIMAOverflow(step + 1),
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TIMAOverflow(step) => TIMAOverflow(step + 1),
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TIMAOverflow(step) => TIMAOverflow(step + 1),
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}
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}
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@ -181,5 +180,5 @@ enum State {
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TIMAOverflow(u8),
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TIMAOverflow(u8),
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AbortedTIMAOverflow(u8),
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AbortedTIMAOverflow(u8),
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Normal,
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Normal,
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LoadTMA,
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LoadTIMA,
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}
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}
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