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3 Commits

2 changed files with 17 additions and 18 deletions

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@ -325,7 +325,7 @@ impl Ppu {
if self.ctrl.window_enabled() if self.ctrl.window_enabled()
&& !self.window_stat.should_draw() && !self.window_stat.should_draw()
&& self.window_stat.coincidence() && self.window_stat.coincidence()
&& self.x_pos as i8 as i16 >= self.pos.window_x as i8 as i16 - 7 && self.x_pos as i16 >= self.pos.window_x as i16 - 7
{ {
self.window_stat.set_should_draw(true); self.window_stat.set_should_draw(true);
self.fetch.back.reset(); self.fetch.back.reset();
@ -700,7 +700,7 @@ impl PixelFetcher {
let id = self.back.tile.id.expect("Tile Number is present"); let id = self.back.tile.id.expect("Tile Number is present");
let tile_data_addr = match control.tile_data_addr() { let tile_data_addr = match control.tile_data_addr() {
TileDataAddress::X8800 => 0x9000u16.wrapping_add(((id as i8 as i16) * 16) as u16), TileDataAddress::X8800 => 0x9000u16.wrapping_add((id as i8 as i16 * 16) as u16),
TileDataAddress::X8000 => 0x8000 + (id as u16 * 16), TileDataAddress::X8000 => 0x8000 + (id as u16 * 16),
}; };

View File

@ -21,17 +21,6 @@ impl Timer {
use State::*; use State::*;
use TimerSpeed::*; use TimerSpeed::*;
match self.state {
TIMAOverflow(_) | AbortedTIMAOverflow(_) => self.next(),
LoadTMA => {
self.counter = self.modulo;
self.interrupt = true;
self.next();
}
Normal => {}
}
self.divider = self.divider.wrapping_add(1); self.divider = self.divider.wrapping_add(1);
// Get Bit Position // Get Bit Position
@ -53,6 +42,17 @@ impl Timer {
} }
self.and_result = Some(new_result); self.and_result = Some(new_result);
match self.state {
TIMAOverflow(_) | AbortedTIMAOverflow(_) => self.next(),
LoadTIMA => {
self.counter = self.modulo;
self.interrupt = true;
self.next();
}
Normal => {}
}
} }
/// 0xFF05 | TIMA - Timer Counter /// 0xFF05 | TIMA - Timer Counter
@ -70,7 +70,7 @@ impl Timer {
self.counter = byte; self.counter = byte;
self.state = AbortedTIMAOverflow(step); self.state = AbortedTIMAOverflow(step);
} }
LoadTMA => {} LoadTIMA => { /* Ignored */ }
} }
} }
@ -95,9 +95,8 @@ impl Timer {
use State::*; use State::*;
self.state = match self.state { self.state = match self.state {
Normal | LoadTMA => Normal, Normal | LoadTIMA | AbortedTIMAOverflow(3) => Normal,
AbortedTIMAOverflow(4) => Normal, TIMAOverflow(3) => LoadTIMA,
TIMAOverflow(4) => LoadTMA,
AbortedTIMAOverflow(step) => AbortedTIMAOverflow(step + 1), AbortedTIMAOverflow(step) => AbortedTIMAOverflow(step + 1),
TIMAOverflow(step) => TIMAOverflow(step + 1), TIMAOverflow(step) => TIMAOverflow(step + 1),
} }
@ -181,5 +180,5 @@ enum State {
TIMAOverflow(u8), TIMAOverflow(u8),
AbortedTIMAOverflow(u8), AbortedTIMAOverflow(u8),
Normal, Normal,
LoadTMA, LoadTIMA,
} }