chore(cart): refactor sections of cartridge code
This commit is contained in:
parent
7f872a554b
commit
ef4f3d9ec6
309
src/cartridge.rs
309
src/cartridge.rs
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@ -35,8 +35,8 @@ impl Cartridge {
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self.mbc.ext_ram()
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}
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pub(crate) fn write_ext_ram(&mut self, mem: Vec<u8>) {
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self.mbc.write_ext_ram(mem)
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pub(crate) fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
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self.mbc.ext_ram_mut()
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}
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#[inline]
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@ -57,14 +57,15 @@ impl Cartridge {
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match mbc_kind {
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MBCKind::None => Box::new(NoMBC),
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MBCKind::MBC1 => Box::new(MBC1::new(ram_size, rom_size)),
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MBCKind::MBC1WithBattery => Box::new(MBC1::with_battery(ram_size, rom_size)),
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MBCKind::MBC2 => Box::new(MBC2::new(rom_cap)),
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MBCKind::MBC2WithBattery => Box::new(MBC2::with_battery(rom_cap)),
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MBCKind::MBC3 => Box::new(MBC3::new(ram_cap)),
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MBCKind::MBC3WithBattery => Box::new(MBC3::with_battery(ram_cap)),
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MBCKind::MBC5 => Box::new(MBC5::new(ram_cap, rom_cap)),
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MBCKind::MBC5WithBattery => Box::new(MBC5::with_battery(ram_cap, rom_cap)),
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MBCKind::MBC1(hw) => Box::new(MBC1::new(hw, ram_size, rom_size)),
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MBCKind::MBC2(hw) => Box::new(MBC2::new(hw, rom_cap)),
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MBCKind::MBC3(hw @ MBC3Hardware::RTC) => Box::new(MBC3::new(hw, ram_cap)),
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MBCKind::MBC3(hw @ MBC3Hardware::RTCAndBatteryRAM) => Box::new(MBC3::new(hw, ram_cap)),
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MBCKind::MBC5(hw @ MBC5Hardware::None) => Box::new(MBC5::new(hw, ram_cap, rom_cap)),
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MBCKind::MBC5(hw @ MBC5Hardware::BatteryRAM) => {
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Box::new(MBC5::new(hw, ram_cap, rom_cap))
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}
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kind => todo!("ROMS with {:?} are currently unsupported", kind),
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}
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}
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@ -92,15 +93,25 @@ impl Cartridge {
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match id {
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0x00 => None,
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0x01 | 0x02 => MBC1,
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0x03 => MBC1WithBattery,
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0x05 => MBC2,
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0x06 => MBC2WithBattery,
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0x19 | 0x1A => MBC5,
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0x1B => MBC5WithBattery,
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0x13 => MBC3WithBattery,
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0x11 | 0x12 => MBC3,
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id => unimplemented!("id {:#04X} is an unsupported MBC", id),
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0x01 => MBC1(MBC1Hardware::None),
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0x02 => MBC1(MBC1Hardware::RAM),
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0x03 => MBC1(MBC1Hardware::BatteryRAM),
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0x05 => MBC2(MBC2Hardware::None),
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0x06 => MBC2(MBC2Hardware::BatteryRAM),
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0x08 | 0x09 => unimplemented!("NoMBC + RAM and NoMBC + Battery unsupported"),
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0x0B | 0x0C | 0x0D => unimplemented!("MM01 unsupported"),
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0x0F => MBC3(MBC3Hardware::RTC),
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0x10 => MBC3(MBC3Hardware::RTCAndBatteryRAM),
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0x11 => MBC3(MBC3Hardware::None),
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0x12 => MBC3(MBC3Hardware::RAM),
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0x13 => MBC3(MBC3Hardware::BatteryRAM),
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0x19 => MBC5(MBC5Hardware::None),
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0x1A => MBC5(MBC5Hardware::RAM),
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0x1B => MBC5(MBC5Hardware::BatteryRAM),
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0x1C => MBC5(MBC5Hardware::Rumble),
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0x1D => MBC5(MBC5Hardware::RumbleRAM),
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0x1E => MBC5(MBC5Hardware::RumbleBatteryRAM),
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id => unimplemented!("MBC with code {:#04X} is unsupported", id),
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}
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}
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}
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@ -110,8 +121,8 @@ impl BusIo for Cartridge {
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use MBCResult::*;
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match self.mbc.handle_read(addr) {
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Address(addr) => self.mem[addr],
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Value(byte) => byte,
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Addr(addr) => self.mem[addr],
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Byte(byte) => byte,
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}
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}
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@ -132,11 +143,11 @@ struct MBC1 {
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rom_size: RomSize,
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mem_enabled: bool,
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has_battery: bool,
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hw: MBC1Hardware,
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}
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impl MBC1 {
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fn new(ram_size: RamSize, rom_size: RomSize) -> Self {
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fn new(hw: MBC1Hardware, ram_size: RamSize, rom_size: RomSize) -> Self {
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Self {
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rom_bank: 0x01,
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mem: vec![0; ram_size.capacity() as usize],
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@ -145,20 +156,7 @@ impl MBC1 {
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ram_bank: Default::default(),
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mode: Default::default(),
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mem_enabled: Default::default(),
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has_battery: Default::default(),
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}
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}
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fn with_battery(ram_size: RamSize, rom_size: RomSize) -> Self {
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Self {
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rom_bank: 0x01,
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mem: vec![0; ram_size.capacity() as usize],
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ram_size,
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rom_size,
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ram_bank: Default::default(),
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mode: Default::default(),
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mem_enabled: Default::default(),
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has_battery: true,
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hw,
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}
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}
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@ -229,15 +227,16 @@ impl MBC1 {
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impl Savable for MBC1 {
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fn ext_ram(&self) -> Option<&[u8]> {
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match self.has_battery {
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true => Some(&self.mem),
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false => None,
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match self.hw {
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MBC1Hardware::BatteryRAM => Some(&self.mem),
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_ => None,
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}
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}
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fn write_ext_ram(&mut self, memory: Vec<u8>) {
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if self.has_battery {
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self.mem.copy_from_slice(&memory);
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fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
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match self.hw {
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MBC1Hardware::BatteryRAM => Some(&mut self.mem),
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_ => None,
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}
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}
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}
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@ -248,16 +247,12 @@ impl MBCIo for MBC1 {
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match addr {
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0x0000..=0x3FFF if self.mode => {
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Address(0x4000 * self.zero_bank() as usize + addr as usize)
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Addr(0x4000 * self.zero_bank() as usize + addr as usize)
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}
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0x0000..=0x3FFF => Address(addr as usize),
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0x4000..=0x7FFF => {
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Address(0x4000 * self.high_bank() as usize + (addr as usize - 0x4000))
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}
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0xA000..=0xBFFF if self.mem_enabled && self.ram_size != RamSize::None => {
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Value(self.mem[self.ram_addr(addr)])
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}
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0xA000..=0xBFFF => Value(0xFF),
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0x0000..=0x3FFF => Addr(addr as usize),
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0x4000..=0x7FFF => Addr(0x4000 * self.high_bank() as usize + (addr as usize - 0x4000)),
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0xA000..=0xBFFF if self.mem_enabled => Byte(self.mem[self.ram_addr(addr)]),
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0xA000..=0xBFFF => Byte(0xFF),
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_ => unreachable!("A read from {:#06X} should not be handled by MBC1", addr),
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}
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}
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@ -272,7 +267,7 @@ impl MBCIo for MBC1 {
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}
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0x4000..=0x5FFF => self.ram_bank = byte & 0x03,
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0x6000..=0x7FFF => self.mode = (byte & 0x01) == 0x01,
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0xA000..=0xBFFF if self.mem_enabled && self.ram_size != RamSize::None => {
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0xA000..=0xBFFF if self.mem_enabled => {
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let ram_addr = self.ram_addr(addr);
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self.mem[ram_addr] = byte;
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}
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@ -407,34 +402,20 @@ struct MBC3 {
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devs_enabled: bool,
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mapped: Option<MBC3Device>,
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memory: Vec<u8>,
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mem: Vec<u8>,
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// RTC Data Latch Previous Write
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prev_latch_write: Option<u8>,
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has_battery: bool,
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hw: MBC3Hardware,
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rtc: RtClock,
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rtc_latch: Option<RtClock>,
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}
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impl MBC3 {
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fn new(ram_cap: usize) -> Self {
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fn new(hw: MBC3Hardware, ram_cap: usize) -> Self {
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Self {
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memory: vec![0; ram_cap],
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rom_bank: Default::default(),
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ram_bank: Default::default(),
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devs_enabled: Default::default(),
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mapped: Default::default(),
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prev_latch_write: Default::default(),
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has_battery: Default::default(),
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rtc: Default::default(),
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rtc_latch: Default::default(),
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}
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}
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fn with_battery(ram_cap: usize) -> Self {
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Self {
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memory: vec![0; ram_cap],
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mem: vec![0; ram_cap],
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rom_bank: Default::default(),
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ram_bank: Default::default(),
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devs_enabled: Default::default(),
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@ -442,22 +423,23 @@ impl MBC3 {
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prev_latch_write: Default::default(),
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rtc: Default::default(),
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rtc_latch: Default::default(),
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has_battery: true,
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hw,
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}
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}
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}
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impl Savable for MBC3 {
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fn ext_ram(&self) -> Option<&[u8]> {
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match self.has_battery {
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true => Some(&self.memory),
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false => None,
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match self.hw {
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MBC3Hardware::BatteryRAM | MBC3Hardware::RTCAndBatteryRAM => Some(&self.mem),
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_ => None,
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}
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}
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fn write_ext_ram(&mut self, memory: Vec<u8>) {
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if self.has_battery {
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self.memory.copy_from_slice(&memory);
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fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
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match self.hw {
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MBC3Hardware::BatteryRAM | MBC3Hardware::RTCAndBatteryRAM => Some(&mut self.mem),
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_ => None,
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}
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}
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}
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@ -468,13 +450,13 @@ impl MBCIo for MBC3 {
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use RtcRegister::*;
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let res = match addr {
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0x0000..=0x3FFF => Address(addr as usize),
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0x4000..=0x7FFF => Address(0x4000 * self.rom_bank as usize + (addr as usize - 0x4000)),
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0x0000..=0x3FFF => Addr(addr as usize),
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0x4000..=0x7FFF => Addr(0x4000 * self.rom_bank as usize + (addr as usize - 0x4000)),
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0xA000..=0xBFFF => match self.mapped {
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Some(MBC3Device::ExternalRam) if self.devs_enabled => {
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Value(self.memory[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)])
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Byte(self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)])
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}
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Some(MBC3Device::Clock(reg)) if self.devs_enabled => Value(
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Some(MBC3Device::Clock(reg)) if self.devs_enabled => Byte(
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self.rtc_latch
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.as_ref()
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.map(|rtc| match reg {
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@ -486,7 +468,7 @@ impl MBCIo for MBC3 {
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})
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.unwrap_or(0xFF),
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),
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_ => Value(0xFF),
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_ => Byte(0xFF),
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},
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_ => unreachable!("A read from {:#06X} should not be handled by MBC3", addr),
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};
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@ -528,7 +510,7 @@ impl MBCIo for MBC3 {
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}
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0xA000..=0xBFFF => match self.mapped {
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Some(MBC3Device::ExternalRam) if self.devs_enabled => {
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self.memory[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)] = byte
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self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)] = byte
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}
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Some(MBC3Device::Clock(rtc_reg)) if self.devs_enabled => match rtc_reg {
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Second => {
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@ -550,8 +532,10 @@ impl MBCIo for MBC3 {
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impl RtClockTick for MBC3 {
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fn tick(&mut self) {
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if let MBC3Hardware::RTCAndBatteryRAM | MBC3Hardware::RTC = self.hw {
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self.rtc.tick();
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}
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}
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}
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#[derive(Debug)]
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@ -562,32 +546,21 @@ struct MBC5 {
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ram_bank: u8,
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rom_cap: usize,
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memory: Vec<u8>,
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mem: Vec<u8>,
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mem_enabled: bool,
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has_battery: bool,
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hw: MBC5Hardware,
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}
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impl MBC5 {
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fn new(ram_cap: usize, rom_cap: usize) -> Self {
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fn new(hw: MBC5Hardware, ram_cap: usize, rom_cap: usize) -> Self {
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Self {
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rom_bank: 0x01,
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memory: vec![0; ram_cap],
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mem: vec![0; ram_cap],
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rom_cap,
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ram_bank: Default::default(),
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mem_enabled: Default::default(),
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has_battery: Default::default(),
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}
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}
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fn with_battery(ram_cap: usize, rom_cap: usize) -> Self {
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Self {
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rom_bank: 0x01,
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memory: vec![0; ram_cap],
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rom_cap,
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ram_bank: Default::default(),
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mem_enabled: Default::default(),
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has_battery: true,
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hw,
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}
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}
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@ -598,15 +571,16 @@ impl MBC5 {
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impl Savable for MBC5 {
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fn ext_ram(&self) -> Option<&[u8]> {
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match self.has_battery {
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true => Some(&self.memory),
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false => None,
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match self.hw {
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MBC5Hardware::RumbleBatteryRAM | MBC5Hardware::BatteryRAM => Some(&self.mem),
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_ => None,
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}
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}
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fn write_ext_ram(&mut self, memory: Vec<u8>) {
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if self.has_battery {
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self.memory.copy_from_slice(&memory);
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fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
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match self.hw {
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MBC5Hardware::RumbleBatteryRAM | MBC5Hardware::BatteryRAM => Some(&mut self.mem),
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_ => None,
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}
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}
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}
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@ -616,12 +590,12 @@ impl MBCIo for MBC5 {
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use MBCResult::*;
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match addr {
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0x0000..=0x3FFF => Address(addr as usize),
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0x4000..=0x7FFF => Address(self.bank_addr(addr)),
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0x0000..=0x3FFF => Addr(addr as usize),
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0x4000..=0x7FFF => Addr(self.bank_addr(addr)),
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0xA000..=0xBFFF if self.mem_enabled => {
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Value(self.memory[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)])
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Byte(self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)])
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}
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0xA000..=0xBFFF => Value(0xFF),
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0xA000..=0xBFFF => Byte(0xFF),
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_ => unreachable!("A read from {:#06X} should not be handled by MBC5", addr),
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}
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}
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@ -633,7 +607,7 @@ impl MBCIo for MBC5 {
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0x3000..=0x3FFF => self.rom_bank = (self.rom_bank & 0x00FF) | (byte as u16 & 0x01) << 8,
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0x4000..=0x5FFF => self.ram_bank = byte & 0x0F,
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0xA000..=0xBFFF if self.mem_enabled => {
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self.memory[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)] = byte;
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self.mem[0x2000 * self.ram_bank as usize + (addr as usize - 0xA000)] = byte;
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}
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0xA000..=0xBFFF => {}
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_ => unreachable!("A write to {:#06X} should not be handled by MBC5", addr),
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@ -649,33 +623,23 @@ impl RtClockTick for MBC5 {
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struct MBC2 {
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/// 4-bit number
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rom_bank: u8,
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memory: Box<[u8; Self::RAM_SIZE]>,
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mem_enabled: bool,
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mem: Box<[u8; Self::RAM_SIZE]>,
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mem_enabled: bool,
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rom_cap: usize,
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has_battery: bool,
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hw: MBC2Hardware,
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}
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impl MBC2 {
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const RAM_SIZE: usize = 0x0200;
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fn new(rom_cap: usize) -> Self {
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fn new(hw: MBC2Hardware, rom_cap: usize) -> Self {
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Self {
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rom_bank: 0x01,
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memory: Box::new([0; Self::RAM_SIZE]),
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mem: Box::new([0; Self::RAM_SIZE]),
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rom_cap,
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mem_enabled: Default::default(),
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has_battery: Default::default(),
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}
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}
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fn with_battery(rom_cap: usize) -> Self {
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Self {
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rom_bank: 0x01,
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memory: Box::new([0; Self::RAM_SIZE]),
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rom_cap,
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mem_enabled: Default::default(),
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has_battery: true,
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hw,
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}
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}
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@ -686,15 +650,16 @@ impl MBC2 {
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|
||||
impl Savable for MBC2 {
|
||||
fn ext_ram(&self) -> Option<&[u8]> {
|
||||
match self.has_battery {
|
||||
true => Some(self.memory.as_ref()),
|
||||
false => None,
|
||||
match self.hw {
|
||||
MBC2Hardware::BatteryRAM => Some(self.mem.as_ref()),
|
||||
MBC2Hardware::None => None,
|
||||
}
|
||||
}
|
||||
|
||||
fn write_ext_ram(&mut self, memory: Vec<u8>) {
|
||||
if self.has_battery {
|
||||
self.memory.copy_from_slice(&memory);
|
||||
fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
|
||||
match self.hw {
|
||||
MBC2Hardware::BatteryRAM => Some(self.mem.as_mut()),
|
||||
MBC2Hardware::None => None,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -704,13 +669,13 @@ impl MBCIo for MBC2 {
|
|||
use MBCResult::*;
|
||||
|
||||
match addr {
|
||||
0x0000..=0x3FFF => Address(addr as usize),
|
||||
0x4000..=0x7FFF => Address(self.rom_addr(addr)),
|
||||
0x0000..=0x3FFF => Addr(addr as usize),
|
||||
0x4000..=0x7FFF => Addr(self.rom_addr(addr)),
|
||||
0xA000..=0xBFFF if self.mem_enabled => {
|
||||
let mbc2_addr = addr as usize & (Self::RAM_SIZE - 1);
|
||||
Value(self.memory[mbc2_addr] | 0xF0)
|
||||
Byte(self.mem[mbc2_addr] | 0xF0)
|
||||
}
|
||||
0xA000..=0xBFFF => Value(0xFF),
|
||||
0xA000..=0xBFFF => Byte(0xFF),
|
||||
_ => unreachable!("A read from {:#06X} should not be handled by MBC2", addr),
|
||||
}
|
||||
}
|
||||
|
|
@ -725,7 +690,7 @@ impl MBCIo for MBC2 {
|
|||
0x0000..=0x3FFF => self.mem_enabled = nybble == 0x0A,
|
||||
0xA000..=0xBFFF if self.mem_enabled => {
|
||||
let mbc2_addr = addr as usize & (Self::RAM_SIZE - 1);
|
||||
self.memory[mbc2_addr] = nybble;
|
||||
self.mem[mbc2_addr] = nybble;
|
||||
}
|
||||
0x4000..=0x7FFF | 0xA000..=0xBFFF => {}
|
||||
_ => unreachable!("A write to {:#06X} should not be handled by MBC2", addr),
|
||||
|
|
@ -745,14 +710,14 @@ impl Savable for NoMBC {
|
|||
None
|
||||
}
|
||||
|
||||
fn write_ext_ram(&mut self, _memory: Vec<u8>) {
|
||||
// Nothing Happens Here
|
||||
fn ext_ram_mut(&mut self) -> Option<&mut [u8]> {
|
||||
None
|
||||
}
|
||||
}
|
||||
|
||||
impl MBCIo for NoMBC {
|
||||
fn handle_read(&self, addr: u16) -> MBCResult {
|
||||
MBCResult::Address(addr as usize)
|
||||
MBCResult::Addr(addr as usize)
|
||||
}
|
||||
|
||||
fn handle_write(&mut self, _: u16, byte: u8) {
|
||||
|
|
@ -771,21 +736,49 @@ trait MBCIo: Savable + RtClockTick {
|
|||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBCResult {
|
||||
Address(usize),
|
||||
Value(u8),
|
||||
Addr(usize),
|
||||
Byte(u8),
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBCKind {
|
||||
None,
|
||||
MBC1,
|
||||
MBC1WithBattery,
|
||||
MBC2,
|
||||
MBC2WithBattery,
|
||||
MBC3,
|
||||
MBC3WithBattery,
|
||||
MBC5,
|
||||
MBC5WithBattery,
|
||||
MBC1(MBC1Hardware),
|
||||
MBC2(MBC2Hardware),
|
||||
MBC3(MBC3Hardware),
|
||||
MBC5(MBC5Hardware),
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBC1Hardware {
|
||||
None,
|
||||
RAM,
|
||||
BatteryRAM,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBC2Hardware {
|
||||
None,
|
||||
BatteryRAM,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBC3Hardware {
|
||||
RTC,
|
||||
RTCAndBatteryRAM,
|
||||
None,
|
||||
RAM,
|
||||
BatteryRAM,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
enum MBC5Hardware {
|
||||
None,
|
||||
RAM,
|
||||
BatteryRAM,
|
||||
Rumble,
|
||||
RumbleRAM,
|
||||
RumbleBatteryRAM,
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy, PartialEq)]
|
||||
|
|
@ -813,12 +806,6 @@ impl RamSize {
|
|||
}
|
||||
}
|
||||
|
||||
impl Default for RamSize {
|
||||
fn default() -> Self {
|
||||
Self::None
|
||||
}
|
||||
}
|
||||
|
||||
impl From<u8> for RamSize {
|
||||
fn from(byte: u8) -> Self {
|
||||
use RamSize::*;
|
||||
|
|
@ -893,15 +880,9 @@ impl std::fmt::Debug for Box<dyn MBCIo> {
|
|||
}
|
||||
}
|
||||
|
||||
impl Default for Box<dyn MBCIo> {
|
||||
fn default() -> Self {
|
||||
Box::new(NoMBC)
|
||||
}
|
||||
}
|
||||
|
||||
trait Savable {
|
||||
fn ext_ram(&self) -> Option<&[u8]>;
|
||||
fn write_ext_ram(&mut self, memory: Vec<u8>);
|
||||
fn ext_ram_mut(&mut self) -> Option<&mut [u8]>;
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
|
|
|
|||
19
src/emu.rs
19
src/emu.rs
|
|
@ -70,6 +70,7 @@ pub fn write_save(cpu: &Cpu) {
|
|||
Some(cart) => match write_save_to_file(cart) {
|
||||
Ok(path) => tracing::info!("Wrote to save at {:?}", path),
|
||||
Err(err @ SaveError::NotApplicable) => tracing::warn!("Unable to Save: {:?}", err),
|
||||
Err(SaveError::DiffSize) => unreachable!(),
|
||||
Err(SaveError::Io(err)) => tracing::error!("{:?}", err),
|
||||
},
|
||||
None => tracing::error!("No cartridge is currently present"),
|
||||
|
|
@ -80,7 +81,8 @@ pub fn load_save(cpu: &mut Cpu) {
|
|||
match cpu.bus.cart.as_mut() {
|
||||
Some(cart) => match read_save_from_file(cart) {
|
||||
Ok(path) => tracing::info!("Loaded save from {:?}", path),
|
||||
Err(err @ SaveError::NotApplicable) => tracing::warn!("Unable to load save: {:?}", err),
|
||||
Err(err @ SaveError::NotApplicable) => tracing::warn!("Unable to load save: {}", err),
|
||||
Err(err @ SaveError::DiffSize) => tracing::error!("Unable to load save: {}", err),
|
||||
Err(SaveError::Io(err)) => match err.kind() {
|
||||
std::io::ErrorKind::NotFound => tracing::warn!("Save not found"),
|
||||
_ => tracing::error!("{:?}", err),
|
||||
|
|
@ -106,8 +108,8 @@ fn write_save_to_file(cart: &Cartridge) -> Result<PathBuf, SaveError> {
|
|||
}
|
||||
|
||||
fn read_save_from_file(cart: &mut Cartridge) -> Result<PathBuf, SaveError> {
|
||||
match cart.title.as_deref() {
|
||||
Some(title) => {
|
||||
match cart.title.clone().zip(cart.ext_ram_mut()) {
|
||||
Some((title, ext_ram)) => {
|
||||
let mut save_path = data_path().unwrap_or_else(|| PathBuf::from("."));
|
||||
save_path.push(title);
|
||||
save_path.set_extension("sav");
|
||||
|
|
@ -116,10 +118,11 @@ fn read_save_from_file(cart: &mut Cartridge) -> Result<PathBuf, SaveError> {
|
|||
let mut memory = Vec::new();
|
||||
file.read_to_end(&mut memory)?;
|
||||
|
||||
// FIXME: We call this whether we can write to Ext RAM or not.
|
||||
// We should add a check that ensures that by this point we know whether
|
||||
// the cartridge has external RAM or not.
|
||||
cart.write_ext_ram(memory);
|
||||
if ext_ram.len() != memory.len() {
|
||||
return Err(SaveError::DiffSize);
|
||||
}
|
||||
|
||||
ext_ram.copy_from_slice(&memory);
|
||||
Ok(save_path)
|
||||
}
|
||||
None => Err(SaveError::NotApplicable),
|
||||
|
|
@ -151,4 +154,6 @@ pub enum SaveError {
|
|||
NotApplicable,
|
||||
#[error(transparent)]
|
||||
Io(#[from] std::io::Error),
|
||||
#[error("save file size differs from external ram")]
|
||||
DiffSize,
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue