Implement basic layout of Gameboy Emulator

This commit is contained in:
Rekai Nyangadzayi Musuka 2020-08-29 18:38:27 -05:00
parent 0401bb7e49
commit e0235094bb
5 changed files with 299 additions and 0 deletions

21
src/bus.rs Normal file
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#[derive(Debug, Copy, Clone)]
pub struct Bus {
}
impl Bus {
pub fn read_byte(&self, address: u16) -> u8 {
unimplemented!()
}
pub fn write_byte(&mut self, address: u16, byte: u8) {
unimplemented!()
}
pub fn read_word(&self, address: u16) -> u16 {
unimplemented!()
}
pub fn write_word(&mut self, address: u16, word: u16) {
unimplemented!()
}
}

158
src/cpu.rs Normal file
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use super::bus::Bus;
use super::instruction::Instruction;
pub struct Cpu {
bus: Bus,
reg: Registers,
flags: Flags,
ime: bool,
state: State,
}
impl Cpu {
pub fn fetch(&self) -> u8 {
self.bus.read_byte(self.reg.pc)
// TODO: Figure out where to increment the program counter.
}
pub fn decode(&self, opcode: u8) -> Instruction {
Instruction::from_byte(self, opcode)
}
pub fn execute(&mut self, instruction: Instruction) {
unimplemented!()
}
}
enum State {
Execute,
Halt,
Stop,
}
impl Cpu {
pub fn set_register(&mut self, register: Register, value: u8) {
match register {
Register::A => self.reg.a = value,
Register::B => self.reg.b = value,
Register::C => self.reg.c = value,
Register::D => self.reg.d = value,
Register::E => self.reg.e = value,
Register::H => self.reg.h = value,
Register::L => self.reg.l = value,
Register::Flags => self.reg.a = value.into()
}
}
pub fn register(&self, register: Register) -> u8 {
match register {
Register::A => self.reg.a,
Register::B => self.reg.b,
Register::C => self.reg.c,
Register::D => self.reg.d,
Register::E => self.reg.e,
Register::H => self.reg.h,
Register::L => self.reg.l,
Register::Flags => self.flags.into()
}
}
pub fn register_pair(&self, pair: RegisterPair) -> u16 {
match pair {
RegisterPair::AF => (self.reg.a as u16) << 8 | u8::from(self.flags) as u16,
RegisterPair::BC => (self.reg.b as u16) << 8 | self.reg.c as u16,
RegisterPair::DE => (self.reg.d as u16) << 8 | self.reg.e as u16,
RegisterPair::HL => (self.reg.h as u16) << 8 | self.reg.l as u16,
RegisterPair::SP => self.reg.sp,
RegisterPair::PC => self.reg.pc,
}
}
pub fn set_register_pair(&mut self, pair: RegisterPair, value: u16) {
let high = (value >> 8) as u8;
let low = value as u8;
match pair {
RegisterPair::AF => {
self.reg.a = high;
self.flags = low.into();
}
RegisterPair::BC => {
self.reg.b = high;
self.reg.c = low;
}
RegisterPair::DE => {
self.reg.d = high;
self.reg.e = low;
}
RegisterPair::HL => {
self.reg.h = high;
self.reg.l = low;
}
RegisterPair::SP => self.reg.sp = value,
RegisterPair::PC => self.reg.pc = value,
}
}
}
pub enum Register {
A,
B,
C,
D,
E,
H,
L,
Flags,
}
pub enum RegisterPair {
AF,
BC,
DE,
HL,
SP,
PC,
}
struct Registers {
a: u8,
b: u8,
c: u8,
d: u8,
e: u8,
h: u8,
l: u8,
sp: u16,
pc: u16,
}
#[derive(Debug, Copy, Clone)]
struct Flags {
z: bool, // Zero Flag
n: bool, // Negative Flag
h: bool, // Half-Carry Flag
c: bool, // Carry Flag
}
impl From<u8> for Flags {
fn from(flag: u8) -> Self {
Self {
z: (flag >> 7) == 1,
n: ((flag >> 6) & 0x01) == 1,
h: ((flag >> 5) & 0x01) == 1,
c: ((flag >> 4) & 0x01) == 1,
}
}
}
impl From<Flags> for u8 {
fn from(flag: Flags) -> Self {
(flag.z as u8) << 7 | (flag.n as u8) << 6 | (flag.h as u8) << 5 | (flag.c as u8) << 4
}
}

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src/instruction.rs Normal file
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use super::cpu::{Cpu, RegisterPair};
pub enum Instruction {
NOP
}
impl Instruction {
pub fn from_byte(cpu: &Cpu, byte: u8) -> Self {
if byte == 0xCB {
Self::from_prefixed_byte(cpu, byte)
} else {
Self::from_unprefixed_byte(cpu, byte)
}
}
fn from_prefixed_byte(cpu: &Cpu, byte: u8) -> Self {
// https://gb-archive.github.io/salvage/decoding_gbz80_opcodes/Decoding%20Gamboy%20Z80%20Opcodes.html
let x = (byte >> 6) & 0b00000011;
let y = (byte >> 3) & 0b00000111;
let z = byte & 0b00000111;
let p = y >> 1;
let q = y & 0b00000001;
unimplemented!()
}
fn from_unprefixed_byte(cpu: &Cpu, byte: u8) -> Self {
unimplemented!()
}
}
enum InstrRegisterPairs {
AF,
BC,
DE,
HL,
IncrementHL,
DecrementHL,
}
enum InstrRegisters {
A,
B,
C,
D,
E,
H,
L,
IndirectHL,
}
enum JumpCondition {
NotZero,
Zero,
NotCarry,
Carry,
Always,
}
struct Table;
impl Table {
pub fn r(index: u8) -> InstrRegisters {
match index {
0 => InstrRegisters::B,
1 => InstrRegisters::C,
2 => InstrRegisters::D,
3 => InstrRegisters::E,
4 => InstrRegisters::H,
5 => InstrRegisters::L,
6 => InstrRegisters::IndirectHL,
7 => InstrRegisters::A,
_ => unreachable!("Index {} is out of bounds in r[]", index)
}
}
pub fn rp2(index: u8) -> RegisterPair {
match index {
0 => RegisterPair::BC,
1 => RegisterPair::DE,
2 => RegisterPair::HL,
3 => RegisterPair::AF,
_ => unreachable!("Index {} out of bounds in rp2[]", index)
}
}
pub fn rp(index: u8) -> RegisterPair {
match index {
0 => RegisterPair::BC,
1 => RegisterPair::DE,
2 => RegisterPair::HL,
3 => RegisterPair::AF,
_ => unreachable!("Index {} out of bounds in rp[]", index)
}
}
pub fn cc(index: u8) -> JumpCondition {
match index {
0 => JumpCondition::NotZero,
1 => JumpCondition::Zero,
2 => JumpCondition::NotCarry,
3 => JumpCondition::Carry,
_ => unreachable!("Index {} out of bounds in cc[]", index)
}
}
pub fn alu(index: u8) -> Instruction {
unimplemented!()
}
}

3
src/lib.rs Normal file
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mod cpu;
mod bus;
mod instruction;

3
src/main.rs Normal file
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fn main() {
println!("Hello World!");
}