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feat: implement registers 0xFF01 and 0xFF02

This commit is contained in:
Rekai Nyangadzayi Musuka 2021-01-19 01:40:07 -06:00
parent 68c9557c43
commit b70c398e14
2 changed files with 6 additions and 3 deletions
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5
src/bus.rs
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@ -106,7 +106,8 @@ impl Bus {
0xFF00..=0xFF7F => { 0xFF00..=0xFF7F => {
// IO Registers // IO Registers
match addr { match addr {
// 0xFF01 => 0xFF01 => self.serial.next,
0xFF02 => self.serial.control.into(),
0xFF07 => self.timer.control.into(), 0xFF07 => self.timer.control.into(),
0xFF0F => self.interrupt.flag.into(), 0xFF0F => self.interrupt.flag.into(),
0xFF11 => self.sound.ch1.sound_duty.into(), 0xFF11 => self.sound.ch1.sound_duty.into(),
@ -176,6 +177,8 @@ impl Bus {
0xFF00..=0xFF7F => { 0xFF00..=0xFF7F => {
// IO Registers // IO Registers
match addr { match addr {
0xFF01 => self.serial.next = byte,
0xFF02 => self.serial.control = byte.into(),
0xFF07 => self.timer.control = byte.into(), 0xFF07 => self.timer.control = byte.into(),
0xFF0F => self.interrupt.flag = byte.into(), 0xFF0F => self.interrupt.flag = byte.into(),
0xFF11 => self.sound.ch1.sound_duty = byte.into(), 0xFF11 => self.sound.ch1.sound_duty = byte.into(),

4
src/serial.rs
View File

@ -1,7 +1,7 @@
#[derive(Debug, Clone, Copy, Default)] #[derive(Debug, Clone, Copy, Default)]
pub struct Serial { pub struct Serial {
next: u8, pub next: u8,
control: SerialControl, pub control: SerialControl,
} }
#[derive(Debug, Clone, Copy, Default)] #[derive(Debug, Clone, Copy, Default)]