chore: document IO registers
This commit is contained in:
12
src/timer.rs
12
src/timer.rs
@@ -3,9 +3,13 @@ use bitfield::bitfield;
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#[derive(Debug, Clone, Copy)]
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pub(crate) struct Timer {
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pub(crate) control: TimerControl,
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/// 0xFF07 | TAC - Timer Control
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pub(crate) ctrl: TimerControl,
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/// 0xFF05 | TIMA - Timer Counter
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pub(crate) counter: u8,
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/// 0xFF06 | TMA - Timer Modulo
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pub(crate) modulo: u8,
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/// 0xFF04 | DIV - Divider Register
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pub(crate) divider: u16,
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prev_and_result: Option<u8>,
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interrupt: bool,
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@@ -19,7 +23,7 @@ impl Timer {
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self.divider = self.divider.wrapping_add(1);
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// Get Bit Position
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let bit = match self.control.speed() {
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let bit = match self.ctrl.speed() {
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Hz4096 => 9,
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Hz262144 => 3,
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Hz65536 => 5,
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@@ -27,7 +31,7 @@ impl Timer {
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};
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let bit = (self.divider >> bit) as u8 & 0x01;
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let timer_enable = self.control.enabled() as u8;
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let timer_enable = self.ctrl.enabled() as u8;
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let and_result = bit & timer_enable;
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if let Some(previous) = self.prev_and_result {
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@@ -64,7 +68,7 @@ impl Timer {
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impl Default for Timer {
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fn default() -> Self {
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Self {
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control: Default::default(),
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ctrl: Default::default(),
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counter: 0,
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modulo: 0,
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divider: 0,
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