chore: remove duplicate Instruction::INC match
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5187cbed76
commit
9cd4c4ea11
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@ -315,18 +315,9 @@ impl Instruction {
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}
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}
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_ => unreachable!(),
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_ => unreachable!(),
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},
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},
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Instruction::INC(Registers::Word(pair)) => {
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Instruction::INC(registers) => {
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// INC rp[p] | Increment Register Pair
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match registers {
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match pair {
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Registers::Byte(reg) => {
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RegisterPair::BC | RegisterPair::DE | RegisterPair::HL | RegisterPair::SP => {
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let value = cpu.register_pair(pair);
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cpu.set_register_pair(pair, value + 1);
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}
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_ => unreachable!(),
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}
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Cycles(8)
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}
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Instruction::INC(Registers::Byte(reg)) => {
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// INC r[y] | Increment Register
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// INC r[y] | Increment Register
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let cycles: Cycles;
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let cycles: Cycles;
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@ -347,7 +338,10 @@ impl Instruction {
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}
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}
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InstrRegister::IndirectHL => {
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InstrRegister::IndirectHL => {
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let addr = cpu.register_pair(RegisterPair::HL);
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let addr = cpu.register_pair(RegisterPair::HL);
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cpu.write_byte(addr, Self::inc_register(cpu.read_byte(addr), &mut flags));
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cpu.write_byte(
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addr,
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Self::inc_register(cpu.read_byte(addr), &mut flags),
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);
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cycles = Cycles(12)
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cycles = Cycles(12)
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}
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}
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InstrRegister::IndirectC => unreachable!(),
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InstrRegister::IndirectC => unreachable!(),
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@ -355,6 +349,22 @@ impl Instruction {
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cpu.set_register(Register::Flag, flags.into());
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cpu.set_register(Register::Flag, flags.into());
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cycles
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cycles
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}
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}
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Registers::Word(pair) => {
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// INC rp[p] | Increment Register Pair
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match pair {
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RegisterPair::BC
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| RegisterPair::DE
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| RegisterPair::HL
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| RegisterPair::SP => {
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let value = cpu.register_pair(pair);
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cpu.set_register_pair(pair, value + 1);
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}
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_ => unreachable!(),
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}
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Cycles(8)
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}
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}
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}
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Instruction::DEC(Registers::Word(pair)) => {
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Instruction::DEC(Registers::Word(pair)) => {
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// DEC rp[p] | Decrement Register Pair
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// DEC rp[p] | Decrement Register Pair
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match pair {
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match pair {
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