chore: remove all unwraps from the project
This commit is contained in:
parent
45466a5733
commit
9301a36682
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@ -147,7 +147,7 @@ impl Instruction {
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InstrRegisterPair::BC | InstrRegisterPair::DE => {
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InstrRegisterPair::BC | InstrRegisterPair::DE => {
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// LD (BC), A | Put A into memory address BC
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// LD (BC), A | Put A into memory address BC
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// LD (DE), A | Put A into memory address DE
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// LD (DE), A | Put A into memory address DE
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let addr = cpu.register_pair(RegisterPair::try_from(pair).unwrap());
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let addr = cpu.register_pair(pair.to_register_pair());
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cpu.write_byte(addr, a);
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cpu.write_byte(addr, a);
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}
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}
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InstrRegisterPair::IncrementHL => {
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InstrRegisterPair::IncrementHL => {
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@ -173,7 +173,7 @@ impl Instruction {
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InstrRegisterPair::BC | InstrRegisterPair::DE => {
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InstrRegisterPair::BC | InstrRegisterPair::DE => {
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// LD A, (BC) | Put value at address BC into A
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// LD A, (BC) | Put value at address BC into A
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// LD A, (DE) | Put value at address DE into A
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// LD A, (DE) | Put value at address DE into A
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let addr = cpu.register_pair(RegisterPair::try_from(pair).unwrap());
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let addr = cpu.register_pair(pair.to_register_pair());
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let byte = cpu.read_byte(addr);
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let byte = cpu.read_byte(addr);
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cpu.set_register(Register::A, byte);
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cpu.set_register(Register::A, byte);
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}
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}
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@ -212,7 +212,7 @@ impl Instruction {
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| InstrRegister::E
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L => {
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| InstrRegister::L => {
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cpu.set_register(Register::try_from(reg).unwrap(), n);
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cpu.set_register(reg.to_register(), n);
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Cycles::new(8)
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Cycles::new(8)
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}
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}
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}
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}
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@ -240,7 +240,7 @@ impl Instruction {
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| InstrRegister::E
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => cpu.register(Register::try_from(rhs).unwrap()),
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| InstrRegister::A => cpu.register(rhs.to_register()),
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InstrRegister::IndirectHL => {
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InstrRegister::IndirectHL => {
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let addr = cpu.register_pair(RegisterPair::HL);
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let addr = cpu.register_pair(RegisterPair::HL);
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cpu.read_byte(addr)
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cpu.read_byte(addr)
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@ -256,7 +256,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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cpu.set_register(Register::try_from(lhs).unwrap(), rhs_value);
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cpu.set_register(lhs.to_register(), rhs_value);
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Cycles::new(4)
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Cycles::new(4)
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}
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}
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InstrRegister::IndirectHL => {
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InstrRegister::IndirectHL => {
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@ -370,7 +370,7 @@ impl Instruction {
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let (cycles, sum) = match reg {
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let (cycles, sum) = match reg {
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B | C | D | E | H | L | A => {
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B | C | D | E | H | L | A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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let value = cpu.register(reg.to_register());
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let sum = Self::add_u8s(a_value, value, &mut flags);
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let sum = Self::add_u8s(a_value, value, &mut flags);
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(Cycles::new(4), sum)
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(Cycles::new(4), sum)
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}
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}
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@ -419,7 +419,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let reg = Register::try_from(reg).unwrap();
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let reg = reg.to_register();
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let value = cpu.register(reg);
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let value = cpu.register(reg);
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cpu.set_register(reg, Self::inc_register(value, &mut flags));
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cpu.set_register(reg, Self::inc_register(value, &mut flags));
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@ -475,7 +475,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let reg = Register::try_from(reg).unwrap();
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let reg = reg.to_register();
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let value = cpu.register(reg);
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let value = cpu.register(reg);
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cpu.set_register(reg, Self::dec_register(value, &mut flags));
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cpu.set_register(reg, Self::dec_register(value, &mut flags));
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@ -594,8 +594,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let value =
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let value = cpu.register(reg.to_register()) + (flags.c() as u8);
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cpu.register(Register::try_from(reg).unwrap()) + (flags.c() as u8);
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sum = Self::add_u8s(a_value, value, &mut flags);
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sum = Self::add_u8s(a_value, value, &mut flags);
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cycles = Cycles::new(4);
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cycles = Cycles::new(4);
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}
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}
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@ -637,7 +636,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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let value = cpu.register(reg.to_register());
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diff = Self::sub_u8s(a_value, value, &mut flags);
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diff = Self::sub_u8s(a_value, value, &mut flags);
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cycles = Cycles::new(4);
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cycles = Cycles::new(4);
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}
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}
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@ -680,8 +679,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let value =
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let value = cpu.register(reg.to_register()) + (flags.c() as u8);
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cpu.register(Register::try_from(reg).unwrap()) + (flags.c() as u8);
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diff = Self::sub_u8s(a_value, value, &mut flags);
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diff = Self::sub_u8s(a_value, value, &mut flags);
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cycles = Cycles::new(4);
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cycles = Cycles::new(4);
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}
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}
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@ -725,7 +723,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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let value = cpu.register(reg.to_register());
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result = a_value & value;
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result = a_value & value;
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cycles = Cycles::new(4);
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cycles = Cycles::new(4);
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}
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}
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@ -769,7 +767,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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let value = cpu.register(reg.to_register());
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result = a_value ^ value;
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result = a_value ^ value;
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cycles = Cycles::new(4);
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cycles = Cycles::new(4);
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}
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}
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@ -813,7 +811,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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let value = cpu.register(reg.to_register());
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result = a_value | value;
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result = a_value | value;
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cycles = Cycles::new(4);
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cycles = Cycles::new(4);
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}
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}
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@ -855,7 +853,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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let value = cpu.register(reg.to_register());
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let _ = Self::sub_u8s(a_value, value, &mut flags);
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let _ = Self::sub_u8s(a_value, value, &mut flags);
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Cycles::new(4)
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Cycles::new(4)
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}
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}
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@ -1089,7 +1087,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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msb = value >> 7;
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msb = value >> 7;
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@ -1129,7 +1127,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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lsb = value & 0x01;
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lsb = value & 0x01;
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@ -1169,7 +1167,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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let (new_reg, new_carry) = Self::rl_thru_carry(value, flags.c());
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let (new_reg, new_carry) = Self::rl_thru_carry(value, flags.c());
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@ -1212,7 +1210,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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let (new_reg, new_carry) = Self::rr_thru_carry(value, flags.c());
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let (new_reg, new_carry) = Self::rr_thru_carry(value, flags.c());
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@ -1255,7 +1253,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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msb = (value >> 7) & 0x01;
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msb = (value >> 7) & 0x01;
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@ -1296,7 +1294,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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lsb = value & 0x01;
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lsb = value & 0x01;
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@ -1338,7 +1336,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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swap_reg = Self::swap_bits(value);
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swap_reg = Self::swap_bits(value);
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@ -1378,7 +1376,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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lsb = value & 0x01;
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lsb = value & 0x01;
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@ -1417,7 +1415,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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is_bit_set = ((value >> y) & 0x01) == 0x01;
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is_bit_set = ((value >> y) & 0x01) == 0x01;
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@ -1451,7 +1449,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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cpu.set_register(register, value & !(1u8 << y));
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cpu.set_register(register, value & !(1u8 << y));
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@ -1479,7 +1477,7 @@ impl Instruction {
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| InstrRegister::H
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::L
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| InstrRegister::A => {
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| InstrRegister::A => {
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let register = Register::try_from(reg).unwrap();
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let register = reg.to_register();
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let value = cpu.register(register);
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let value = cpu.register(register);
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cpu.set_register(register, value | (1u8 << y));
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cpu.set_register(register, value | (1u8 << y));
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@ -2189,6 +2187,18 @@ impl From<Cycles> for u32 {
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}
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}
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}
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}
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impl InstrRegisterPair {
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pub fn to_register_pair(self) -> RegisterPair {
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RegisterPair::try_from(self).expect("Failed to convert InstrRegisterPair to RegisterPair")
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}
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}
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impl InstrRegister {
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pub fn to_register(self) -> Register {
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Register::try_from(self).expect("Failed to convert from InstrRegister to Register")
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}
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}
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#[cfg(test)]
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#[cfg(test)]
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mod tests {
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mod tests {
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use super::Cycles;
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use super::Cycles;
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