feat: stub sound register 0xff26

This commit is contained in:
Rekai Nyangadzayi Musuka 2021-01-03 02:05:46 -06:00
parent 1b53363095
commit 834423fe18
4 changed files with 42 additions and 1 deletions

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@ -1,6 +1,7 @@
use super::cartridge::Cartridge; use super::cartridge::Cartridge;
use super::interrupt::Interrupt; use super::interrupt::Interrupt;
use super::ppu::PPU; use super::ppu::PPU;
use super::sound::Sound;
use super::timer::Timer; use super::timer::Timer;
use super::work_ram::{VariableWorkRAM, WorkRAM}; use super::work_ram::{VariableWorkRAM, WorkRAM};
@ -13,6 +14,7 @@ pub struct Bus {
vwram: VariableWorkRAM, vwram: VariableWorkRAM,
timer: Timer, timer: Timer,
interrupt: Interrupt, interrupt: Interrupt,
sound: Sound,
} }
impl Default for Bus { impl Default for Bus {
@ -25,6 +27,7 @@ impl Default for Bus {
vwram: Default::default(), vwram: Default::default(),
timer: Default::default(), timer: Default::default(),
interrupt: Default::default(), interrupt: Default::default(),
sound: Default::default(),
} }
} }
} }
@ -96,6 +99,7 @@ impl Bus {
match addr { match addr {
0xFF07 => self.timer.control.into(), 0xFF07 => self.timer.control.into(),
0xFF0F => self.interrupt.flag.into(), 0xFF0F => self.interrupt.flag.into(),
0xFF26 => self.sound.status.into(),
_ => unimplemented!("Unable to read {:#06X} in I/O Registers", addr), _ => unimplemented!("Unable to read {:#06X} in I/O Registers", addr),
} }
} }
@ -153,6 +157,7 @@ impl Bus {
match addr { match addr {
0xFF07 => self.timer.control = byte.into(), 0xFF07 => self.timer.control = byte.into(),
0xFF0F => self.interrupt.flag = byte.into(), 0xFF0F => self.interrupt.flag = byte.into(),
0xFF26 => self.sound.status = byte.into(), // FIXME: Should we control which bytes are written to here?
_ => unimplemented!("Unable to write to {:#06X} in I/O Registers", addr), _ => unimplemented!("Unable to write to {:#06X} in I/O Registers", addr),
}; };
} }

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@ -4,5 +4,6 @@ pub mod cpu;
mod instruction; mod instruction;
mod interrupt; mod interrupt;
mod ppu; mod ppu;
mod sound;
mod timer; mod timer;
mod work_ram; mod work_ram;

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@ -1,7 +1,7 @@
use gb::cpu::Cpu as LR35902; use gb::cpu::Cpu as LR35902;
fn main() { fn main() {
let mut game_boy = LR35902::new_without_boot(); let mut game_boy = LR35902::new();
game_boy.load_cartridge("bin/cpu_instrs.gb"); game_boy.load_cartridge("bin/cpu_instrs.gb");

35
src/sound.rs Normal file
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@ -0,0 +1,35 @@
#[derive(Debug, Clone, Copy, Default)]
pub struct Sound {
pub status: SoundStatus,
}
#[derive(Debug, Clone, Copy, Default)]
pub struct SoundStatus {
pub all_enabled: bool, // You can actually write to this one.
sound_4: bool,
sound_3: bool,
sound_2: bool,
sound_1: bool,
}
impl From<u8> for SoundStatus {
fn from(byte: u8) -> Self {
Self {
all_enabled: (byte >> 7) & 0x01 == 0x01,
sound_4: (byte >> 3) & 0x01 == 0x01,
sound_3: (byte >> 2) & 0x01 == 0x01,
sound_2: (byte >> 1) & 0x01 == 0x01,
sound_1: (byte >> 0) & 0x01 == 0x01,
}
}
}
impl From<SoundStatus> for u8 {
fn from(status: SoundStatus) -> Self {
(status.all_enabled as u8) << 7
| (status.sound_4 as u8) << 3
| (status.sound_3 as u8) << 2
| (status.sound_2 as u8) << 1
| (status.sound_1 as u8) << 0
}
}