chore(bus): add a select few read/write guards
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parent
50efe12aec
commit
2b7958f5f3
41
src/bus.rs
41
src/bus.rs
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@ -158,14 +158,10 @@ impl BusIo for Bus {
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}
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0x8000..=0x9FFF => {
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// 8KB Video RAM
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// TODO: Fix Timing issues in PPU
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// match self.ppu.stat.mode() {
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// PpuMode::VBlank => 0xFF,
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// _ => self.ppu.read_byte(addr),
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// }
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self.ppu.read_byte(addr)
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match self.ppu.stat.mode() {
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PpuMode::VBlank => 0xFF,
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_ => self.ppu.read_byte(addr),
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}
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}
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0xA000..=0xBFFF => match self.cartridge.as_ref() {
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// 8KB External RAM
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@ -195,16 +191,12 @@ impl BusIo for Bus {
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}
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0xFE00..=0xFE9F => {
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// Sprite Attribute Table
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use PpuMode::{HBlank, VBlank};
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// TODO: Fix timing issues in the PPU
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// use PpuMode::{HBlank, VBlank};
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// match self.ppu.stat.mode() {
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// HBlank | VBlank => self.ppu.oam.read_byte(addr),
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// _ => 0xFF,
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// }
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self.ppu.oam.read_byte(addr)
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match self.ppu.stat.mode() {
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HBlank | VBlank => self.ppu.oam.read_byte(addr),
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_ => 0xFF,
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}
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}
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0xFEA0..=0xFEFF => {
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// Prohibited Memory
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@ -313,15 +305,12 @@ impl BusIo for Bus {
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}
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0xFE00..=0xFE9F => {
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// Sprite Attribute Table
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// use PpuMode::{HBlank, VBlank};
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use PpuMode::{HBlank, VBlank};
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// TODO: Fix Timing issues in the PPU
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// match self.ppu.stat.mode() {
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// HBlank | VBlank => self.ppu.oam.write_byte(addr, byte),
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// _ => {}
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// }
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self.ppu.oam.write_byte(addr, byte)
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match self.ppu.stat.mode() {
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HBlank | VBlank => self.ppu.oam.write_byte(addr, byte),
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_ => {}
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}
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}
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0xFEA0..=0xFEFF => {} // TODO: As far as I know, writes to here do nothing.
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0xFF00..=0xFF7F => {
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@ -376,7 +365,7 @@ impl BusIo for Bus {
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self.boot = None;
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}
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}
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_ => unimplemented!("Unable to write to {:#06X} in I/O Registers", addr),
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_ => {} // unimplemented!("Unable to write to {:#06X} in I/O Registers", addr),
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};
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}
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0xFF80..=0xFFFE => {
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