chore: small code-cleanup changes
This commit is contained in:
parent
999f661e6b
commit
293e5762c3
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@ -58,6 +58,15 @@ dependencies = [
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"winapi",
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"winapi",
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]
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]
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[[package]]
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name = "ansi_term"
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version = "0.12.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "d52a9bb7ec0cf484c551830a7ce27bd20d67eac647e1befb56b0be4ee39a55d2"
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dependencies = [
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"winapi",
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]
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[[package]]
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[[package]]
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name = "anyhow"
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name = "anyhow"
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version = "1.0.44"
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version = "1.0.44"
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@ -236,6 +245,18 @@ version = "0.1.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "fd16c4719339c4530435d38e511904438d07cce7950afa3718a84ac36c10e89e"
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checksum = "fd16c4719339c4530435d38e511904438d07cce7950afa3718a84ac36c10e89e"
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[[package]]
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name = "chrono"
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version = "0.4.19"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "670ad68c9088c2a963aaa298cb369688cf3f9465ce5e2d4ca10e6e0098a1ce73"
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dependencies = [
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"libc",
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"num-integer",
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"num-traits",
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"winapi",
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]
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[[package]]
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[[package]]
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name = "clang-sys"
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name = "clang-sys"
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version = "1.2.2"
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version = "1.2.2"
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@ -253,7 +274,7 @@ version = "2.33.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "37e58ac78573c40708d45522f0d80fa2f01cc4f9b4e2bf749807255454312002"
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checksum = "37e58ac78573c40708d45522f0d80fa2f01cc4f9b4e2bf749807255454312002"
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dependencies = [
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dependencies = [
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"ansi_term",
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"ansi_term 0.11.0",
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"atty",
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"atty",
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"bitflags",
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"bitflags",
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"strsim 0.8.0",
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"strsim 0.8.0",
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@ -711,6 +732,8 @@ dependencies = [
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"pixels",
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"pixels",
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"rodio",
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"rodio",
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"rtrb",
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"rtrb",
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"tracing",
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"tracing-subscriber",
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"winit",
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"winit",
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"winit_input_helper",
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"winit_input_helper",
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]
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]
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@ -1053,6 +1076,15 @@ dependencies = [
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"libc",
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"libc",
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]
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]
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[[package]]
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name = "matchers"
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version = "0.0.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "f099785f7595cc4b4553a174ce30dd7589ef93391ff414dbb67f62392b9e0ce1"
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dependencies = [
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"regex-automata",
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]
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[[package]]
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[[package]]
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name = "memchr"
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name = "memchr"
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version = "2.4.1"
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version = "2.4.1"
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@ -1306,6 +1338,16 @@ dependencies = [
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"syn",
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"syn",
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]
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]
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[[package]]
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name = "num-integer"
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version = "0.1.44"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "d2cc698a63b549a70bc047073d2949cce27cd1c7b0a4a862d08a8031bc2801db"
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dependencies = [
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"autocfg",
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"num-traits",
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]
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[[package]]
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[[package]]
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name = "num-traits"
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name = "num-traits"
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version = "0.2.14"
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version = "0.2.14"
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@ -1440,6 +1482,12 @@ version = "2.1.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "d4fd5641d01c8f18a23da7b6fe29298ff4b55afcccdf78973b24cf3175fee32e"
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checksum = "d4fd5641d01c8f18a23da7b6fe29298ff4b55afcccdf78973b24cf3175fee32e"
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[[package]]
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name = "pin-project-lite"
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version = "0.2.7"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "8d31d11c69a6b52a174b42bdc0c30e5e11670f90788b2c471c31c1d17d449443"
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[[package]]
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[[package]]
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name = "pixels"
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name = "pixels"
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version = "0.7.0"
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version = "0.7.0"
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@ -1552,6 +1600,15 @@ dependencies = [
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"regex-syntax",
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"regex-syntax",
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]
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]
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[[package]]
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name = "regex-automata"
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version = "0.1.10"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "6c230d73fb8d8c1b9c0b3135c5142a8acee3a0558fb8db5cf1cb65f8d7862132"
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dependencies = [
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"regex-syntax",
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]
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[[package]]
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[[package]]
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name = "regex-syntax"
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name = "regex-syntax"
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version = "0.6.25"
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version = "0.6.25"
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@ -1707,6 +1764,15 @@ version = "0.6.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "2579985fda508104f7587689507983eadd6a6e84dd35d6d115361f530916fa0d"
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checksum = "2579985fda508104f7587689507983eadd6a6e84dd35d6d115361f530916fa0d"
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[[package]]
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name = "sharded-slab"
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version = "0.1.4"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "900fba806f70c630b0a382d0d825e17a0f19fcd059a2ade1ff237bcddf446b31"
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dependencies = [
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"lazy_static",
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]
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[[package]]
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[[package]]
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name = "shlex"
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name = "shlex"
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version = "0.1.1"
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version = "0.1.1"
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@ -1886,6 +1952,15 @@ dependencies = [
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"syn",
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"syn",
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]
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]
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[[package]]
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name = "thread_local"
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version = "1.1.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "8018d24e04c95ac8790716a5987d0fec4f8b27249ffa0f7d33f1369bdfb88cbd"
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dependencies = [
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"once_cell",
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]
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[[package]]
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[[package]]
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name = "tinyvec"
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name = "tinyvec"
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version = "1.5.0"
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version = "1.5.0"
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@ -1910,6 +1985,81 @@ dependencies = [
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"serde",
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"serde",
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]
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]
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[[package]]
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name = "tracing"
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version = "0.1.29"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "375a639232caf30edfc78e8d89b2d4c375515393e7af7e16f01cd96917fb2105"
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dependencies = [
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"cfg-if 1.0.0",
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"pin-project-lite",
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"tracing-attributes",
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"tracing-core",
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]
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[[package]]
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name = "tracing-attributes"
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version = "0.1.18"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "f4f480b8f81512e825f337ad51e94c1eb5d3bbdf2b363dcd01e2b19a9ffe3f8e"
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dependencies = [
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"proc-macro2",
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"quote",
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"syn",
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]
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[[package]]
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name = "tracing-core"
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version = "0.1.21"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "1f4ed65637b8390770814083d20756f87bfa2c21bf2f110babdc5438351746e4"
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dependencies = [
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"lazy_static",
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]
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[[package]]
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name = "tracing-log"
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version = "0.1.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "a6923477a48e41c1951f1999ef8bb5a3023eb723ceadafe78ffb65dc366761e3"
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dependencies = [
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"lazy_static",
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"log",
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"tracing-core",
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]
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[[package]]
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name = "tracing-serde"
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version = "0.1.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "fb65ea441fbb84f9f6748fd496cf7f63ec9af5bca94dd86456978d055e8eb28b"
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dependencies = [
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"serde",
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"tracing-core",
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]
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[[package]]
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name = "tracing-subscriber"
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version = "0.2.25"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "0e0d2eaa99c3c2e41547cfa109e910a68ea03823cccad4a0525dcbc9b01e8c71"
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dependencies = [
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"ansi_term 0.12.1",
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"chrono",
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"lazy_static",
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"matchers",
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"regex",
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"serde",
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"serde_json",
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"sharded-slab",
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"smallvec",
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"thread_local",
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"tracing",
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"tracing-core",
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"tracing-log",
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"tracing-serde",
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]
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[[package]]
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[[package]]
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name = "ttf-parser"
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name = "ttf-parser"
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version = "0.6.2"
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version = "0.6.2"
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rodio = "0.14"
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rodio = "0.14"
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rtrb = "0.2"
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rtrb = "0.2"
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directories-next = "2.0"
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directories-next = "2.0"
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tracing = "0.1.29"
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tracing-subscriber = "0.2.25"
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[profile.release]
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[profile.release]
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debug = true
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debug = true
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@ -1,6 +1,7 @@
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use crate::bus::BusIo;
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use crate::bus::BusIo;
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use crate::emu::SM83_CLOCK_SPEED;
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use crate::emu::SM83_CLOCK_SPEED;
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use gen::SampleProducer;
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use gen::SampleProducer;
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use tracing::warn;
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use types::ch1::{Sweep, SweepDirection};
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use types::ch1::{Sweep, SweepDirection};
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use types::ch3::Volume as Ch3Volume;
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use types::ch3::Volume as Ch3Volume;
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use types::ch4::{CounterWidth, Frequency as Ch4Frequency, PolynomialCounter};
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use types::ch4::{CounterWidth, Frequency as Ch4Frequency, PolynomialCounter};
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@ -54,7 +55,7 @@ impl BusIo for Apu {
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0x26 => self.ctrl.status(self),
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0x26 => self.ctrl.status(self),
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0x30..=0x3F => self.ch3.read_byte(addr),
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0x30..=0x3F => self.ch3.read_byte(addr),
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_ => {
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_ => {
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eprintln!("Read 0xFF from unused IO register {:#06X} [APU]", addr);
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warn!("Attempted read from {:#06X}", addr);
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0xFF
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0xFF
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}
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}
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}
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}
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0x26 => self.set_status(byte),
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0x26 => self.set_status(byte),
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0x30..=0x3F => self.ch3.write_byte(addr, byte),
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0x30..=0x3F => self.ch3.write_byte(addr, byte),
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_ if !self.ctrl.enabled => {}
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_ if !self.ctrl.enabled => {}
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_ => eprintln!(
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_ => warn!("Attempted write of {:#04X} to {:#06X}", byte, addr),
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"Wrote {:#04X} to unused IO register {:#06X} [APU]",
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byte, addr
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),
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}
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}
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}
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}
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}
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}
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13
src/bus.rs
13
src/bus.rs
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@ -1,3 +1,5 @@
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use tracing::warn;
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use crate::apu::Apu;
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use crate::apu::Apu;
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use crate::cartridge::Cartridge;
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use crate::cartridge::Cartridge;
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use crate::high_ram::HighRam;
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use crate::high_ram::HighRam;
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@ -14,7 +16,7 @@ pub(crate) const BOOT_SIZE: usize = 0x100;
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pub struct Bus {
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pub struct Bus {
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boot: Option<[u8; BOOT_SIZE]>, // Boot ROM is 256b long
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boot: Option<[u8; BOOT_SIZE]>, // Boot ROM is 256b long
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cart: Option<Cartridge>,
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cart: Option<Cartridge>,
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pub(crate) ppu: Ppu,
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ppu: Ppu,
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work_ram: WorkRam,
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work_ram: WorkRam,
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var_ram: VariableWorkRam,
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var_ram: VariableWorkRam,
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pub(crate) timer: Timer,
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pub(crate) timer: Timer,
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@ -100,6 +102,11 @@ impl Bus {
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pub(crate) fn cart_mut(&mut self) -> Option<&mut Cartridge> {
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pub(crate) fn cart_mut(&mut self) -> Option<&mut Cartridge> {
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self.cart.as_mut()
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self.cart.as_mut()
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}
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}
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#[inline]
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pub fn ppu(&self) -> &Ppu {
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&self.ppu
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}
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}
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}
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impl Bus {
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impl Bus {
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@ -251,7 +258,7 @@ impl BusIo for Bus {
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0x4A => self.ppu.pos.window_y,
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0x4A => self.ppu.pos.window_y,
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0x4B => self.ppu.pos.window_x,
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0x4B => self.ppu.pos.window_x,
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_ => {
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_ => {
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eprintln!("Read 0xFF from unused IO register {:#06X}.", addr);
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warn!("Attempted read from {:#06X} on IO", addr);
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0xFF
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0xFF
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}
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}
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}
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}
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@ -368,7 +375,7 @@ impl BusIo for Bus {
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self.boot = None;
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self.boot = None;
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}
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}
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}
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}
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_ => eprintln!("Wrote {:#04X} to unused IO register {:#06X}.", byte, addr),
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_ => warn!("Attempted write of {:#04X} to {:#06X} on IO", byte, addr),
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};
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};
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}
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}
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0xFF80..=0xFFFE => {
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0xFF80..=0xFFFE => {
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@ -1,3 +1,5 @@
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use tracing::{info, warn};
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use crate::bus::BusIo;
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use crate::bus::BusIo;
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const RAM_SIZE_ADDRESS: usize = 0x0149;
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const RAM_SIZE_ADDRESS: usize = 0x0149;
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||||||
|
@ -15,7 +17,7 @@ pub(crate) struct Cartridge {
|
||||||
impl Cartridge {
|
impl Cartridge {
|
||||||
pub(crate) fn new(memory: Vec<u8>) -> Self {
|
pub(crate) fn new(memory: Vec<u8>) -> Self {
|
||||||
let title = Self::find_title(&memory);
|
let title = Self::find_title(&memory);
|
||||||
eprintln!("Cartridge Title: {:?}", title);
|
info!("Title: {:?}", title);
|
||||||
|
|
||||||
Self {
|
Self {
|
||||||
mbc: Self::detect_mbc(&memory),
|
mbc: Self::detect_mbc(&memory),
|
||||||
|
@ -39,20 +41,20 @@ impl Cartridge {
|
||||||
let ram_cap = ram_size.capacity();
|
let ram_cap = ram_size.capacity();
|
||||||
let rom_cap = rom_size.capacity();
|
let rom_cap = rom_size.capacity();
|
||||||
|
|
||||||
eprintln!("Cartridge Ram Size: {} bytes", ram_cap);
|
info!("RAM size: {} bytes", ram_cap);
|
||||||
eprintln!("Cartridge ROM Size: {} bytes", rom_size.capacity());
|
info!("ROM size: {} bytes", rom_size.capacity());
|
||||||
eprintln!("MBC Type: {:?}", mbc_kind);
|
info!("MBC kind: {:?}", mbc_kind);
|
||||||
|
|
||||||
match mbc_kind {
|
match mbc_kind {
|
||||||
MBCKind::None => Box::new(NoMBC),
|
MBCKind::None => Box::new(NoMBC),
|
||||||
MBCKind::MBC1 => Box::new(MBC1::new(ram_size, rom_size)),
|
MBCKind::MBC1 => Box::new(MBC1::new(ram_size, rom_size)),
|
||||||
MBCKind::MBC1WithBattery => Box::new(MBC1::with_battery(ram_size, rom_size)), // TODO: Implement Saving
|
MBCKind::MBC1WithBattery => Box::new(MBC1::with_battery(ram_size, rom_size)),
|
||||||
MBCKind::MBC2 => Box::new(MBC2::new(rom_cap)),
|
MBCKind::MBC2 => Box::new(MBC2::new(rom_cap)),
|
||||||
MBCKind::MBC2WithBattery => Box::new(MBC2::with_battery(rom_cap)), // TODO: Implement Saving
|
MBCKind::MBC2WithBattery => Box::new(MBC2::with_battery(rom_cap)),
|
||||||
MBCKind::MBC3 => Box::new(MBC3::new(ram_cap)),
|
MBCKind::MBC3 => Box::new(MBC3::new(ram_cap)),
|
||||||
MBCKind::MBC3WithBattery => Box::new(MBC3::with_battery(ram_cap)), // TODO: Implement Saving
|
MBCKind::MBC3WithBattery => Box::new(MBC3::with_battery(ram_cap)),
|
||||||
MBCKind::MBC5 => Box::new(MBC5::new(ram_cap, rom_cap)),
|
MBCKind::MBC5 => Box::new(MBC5::new(ram_cap, rom_cap)),
|
||||||
MBCKind::MBC5WithBattery => Box::new(MBC5::with_battery(ram_cap, rom_cap)), // TDO: Implement Saving
|
MBCKind::MBC5WithBattery => Box::new(MBC5::with_battery(ram_cap, rom_cap)),
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -596,8 +598,8 @@ impl MBCIo for NoMBC {
|
||||||
MBCResult::Address(addr as usize)
|
MBCResult::Address(addr as usize)
|
||||||
}
|
}
|
||||||
|
|
||||||
fn handle_write(&mut self, _addr: u16, _byte: u8) {
|
fn handle_write(&mut self, _: u16, byte: u8) {
|
||||||
// eprintln!("Tried to write {:#04X} to a read-only cartridge", byte);
|
warn!("Attempted write of {:#04X} to cartridge w/out MBC", byte);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
17
src/cpu.rs
17
src/cpu.rs
|
@ -7,7 +7,7 @@ use std::fmt::{Display, Formatter, Result as FmtResult};
|
||||||
|
|
||||||
#[derive(Debug, Default)]
|
#[derive(Debug, Default)]
|
||||||
pub struct Cpu {
|
pub struct Cpu {
|
||||||
pub bus: Bus,
|
pub(crate) bus: Bus,
|
||||||
reg: Registers,
|
reg: Registers,
|
||||||
flags: Flags,
|
flags: Flags,
|
||||||
ime: ImeState,
|
ime: ImeState,
|
||||||
|
@ -118,13 +118,10 @@ impl Cpu {
|
||||||
use HaltKind::*;
|
use HaltKind::*;
|
||||||
|
|
||||||
self.bus.clock();
|
self.bus.clock();
|
||||||
|
return match kind {
|
||||||
let elapsed = match kind {
|
|
||||||
ImeEnabled | NonePending => 4,
|
ImeEnabled | NonePending => 4,
|
||||||
SomePending => todo!("Implement HALT bug"),
|
SomePending => todo!("Implement HALT bug"),
|
||||||
};
|
};
|
||||||
|
|
||||||
return elapsed;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
let opcode = self.fetch();
|
let opcode = self.fetch();
|
||||||
|
@ -133,11 +130,11 @@ impl Cpu {
|
||||||
self.handle_ei();
|
self.handle_ei();
|
||||||
|
|
||||||
// For use in Blargg's Test ROMs
|
// For use in Blargg's Test ROMs
|
||||||
if self.read_byte(0xFF02) == 0x81 {
|
// if self.read_byte(0xFF02) == 0x81 {
|
||||||
let c = self.read_byte(0xFF01) as char;
|
// let c = self.read_byte(0xFF01) as char;
|
||||||
self.write_byte(0xFF02, 0x00);
|
// self.write_byte(0xFF02, 0x00);
|
||||||
eprint!("{}", c);
|
// eprint!("{}", c);
|
||||||
}
|
// }
|
||||||
|
|
||||||
elapsed
|
elapsed
|
||||||
}
|
}
|
||||||
|
|
14
src/emu.rs
14
src/emu.rs
|
@ -31,7 +31,7 @@ pub fn run_frame(emu: &mut Emulator, gamepad: &mut Gilrs, key: &WinitInputHelper
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn draw_frame(emu: &Emulator, buf: &mut [u8; GB_HEIGHT * GB_WIDTH * 4]) {
|
pub fn draw_frame(emu: &Emulator, buf: &mut [u8; GB_HEIGHT * GB_WIDTH * 4]) {
|
||||||
buf.copy_from_slice(emu.cpu.bus().ppu.frame_buf());
|
buf.copy_from_slice(emu.cpu.bus().ppu().frame_buf());
|
||||||
}
|
}
|
||||||
|
|
||||||
pub struct Emulator {
|
pub struct Emulator {
|
||||||
|
@ -121,6 +121,8 @@ pub mod build {
|
||||||
use std::io::{Read, Result};
|
use std::io::{Read, Result};
|
||||||
use std::path::Path;
|
use std::path::Path;
|
||||||
|
|
||||||
|
use tracing::info;
|
||||||
|
|
||||||
use crate::bus::BOOT_SIZE;
|
use crate::bus::BOOT_SIZE;
|
||||||
use crate::cpu::Cpu;
|
use crate::cpu::Cpu;
|
||||||
|
|
||||||
|
@ -159,8 +161,14 @@ pub mod build {
|
||||||
|
|
||||||
pub fn finish(mut self) -> Emulator {
|
pub fn finish(mut self) -> Emulator {
|
||||||
let mut emu = Emulator::new(match self.boot {
|
let mut emu = Emulator::new(match self.boot {
|
||||||
Some(rom) => Cpu::with_boot(rom),
|
Some(rom) => {
|
||||||
None => Cpu::with_boot(*include_bytes!("../bin/bootix_dmg.bin")),
|
info!("User-provided Boot ROM");
|
||||||
|
Cpu::with_boot(rom)
|
||||||
|
}
|
||||||
|
None => {
|
||||||
|
info!("Built-in Boot ROM");
|
||||||
|
Cpu::with_boot(*include_bytes!("../bin/bootix_dmg.bin"))
|
||||||
|
}
|
||||||
});
|
});
|
||||||
|
|
||||||
if let Some(rom) = self.cart.take() {
|
if let Some(rom) = self.cart.take() {
|
||||||
|
|
|
@ -116,7 +116,7 @@ impl std::fmt::Debug for Instruction {
|
||||||
impl Instruction {
|
impl Instruction {
|
||||||
pub(crate) fn execute(cpu: &mut Cpu, instruction: Self) -> Cycle {
|
pub(crate) fn execute(cpu: &mut Cpu, instruction: Self) -> Cycle {
|
||||||
match instruction {
|
match instruction {
|
||||||
Instruction::NOP => (4),
|
Instruction::NOP => 4,
|
||||||
Instruction::LD(target, src) => match (target, src) {
|
Instruction::LD(target, src) => match (target, src) {
|
||||||
(LDTarget::IndirectImmediateWord, LDSource::SP) => {
|
(LDTarget::IndirectImmediateWord, LDSource::SP) => {
|
||||||
// LD (u16), SP | Store stack pointer in byte at 16-bit register
|
// LD (u16), SP | Store stack pointer in byte at 16-bit register
|
||||||
|
@ -361,12 +361,12 @@ impl Instruction {
|
||||||
let (cycles, sum) = match reg {
|
let (cycles, sum) = match reg {
|
||||||
B | C | D | E | H | L | A => {
|
B | C | D | E | H | L | A => {
|
||||||
let right = cpu.register(reg.cpu_register());
|
let right = cpu.register(reg.cpu_register());
|
||||||
((4), Self::add(left, right, &mut flags))
|
(4, Self::add(left, right, &mut flags))
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let right = Self::read_byte(&mut cpu.bus, addr);
|
let right = Self::read_byte(&mut cpu.bus, addr);
|
||||||
((8), Self::add(left, right, &mut flags))
|
(8, Self::add(left, right, &mut flags))
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -610,13 +610,13 @@ impl Instruction {
|
||||||
B | C | D | E | H | L | A => {
|
B | C | D | E | H | L | A => {
|
||||||
let right = cpu.register(reg.cpu_register());
|
let right = cpu.register(reg.cpu_register());
|
||||||
let sum = Self::add_with_carry_bit(left, right, flags.c(), &mut flags);
|
let sum = Self::add_with_carry_bit(left, right, flags.c(), &mut flags);
|
||||||
((4), sum)
|
(4, sum)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let right = Self::read_byte(&mut cpu.bus, addr);
|
let right = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let sum = Self::add_with_carry_bit(left, right, flags.c(), &mut flags);
|
let sum = Self::add_with_carry_bit(left, right, flags.c(), &mut flags);
|
||||||
((8), sum)
|
(8, sum)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.set_register(CpuRegister::A, sum);
|
cpu.set_register(CpuRegister::A, sum);
|
||||||
|
@ -646,12 +646,12 @@ impl Instruction {
|
||||||
let (cycles, diff) = match reg {
|
let (cycles, diff) = match reg {
|
||||||
B | C | D | E | H | L | A => {
|
B | C | D | E | H | L | A => {
|
||||||
let right = cpu.register(reg.cpu_register());
|
let right = cpu.register(reg.cpu_register());
|
||||||
((4), Self::sub(left, right, &mut flags))
|
(4, Self::sub(left, right, &mut flags))
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let right = Self::read_byte(&mut cpu.bus, addr);
|
let right = Self::read_byte(&mut cpu.bus, addr);
|
||||||
((8), Self::sub(left, right, &mut flags))
|
(8, Self::sub(left, right, &mut flags))
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.set_register(CpuRegister::A, diff);
|
cpu.set_register(CpuRegister::A, diff);
|
||||||
|
@ -681,13 +681,13 @@ impl Instruction {
|
||||||
B | C | D | E | H | L | A => {
|
B | C | D | E | H | L | A => {
|
||||||
let right = cpu.register(reg.cpu_register());
|
let right = cpu.register(reg.cpu_register());
|
||||||
let diff = Self::sub_with_carry(left, right, flags.c(), &mut flags);
|
let diff = Self::sub_with_carry(left, right, flags.c(), &mut flags);
|
||||||
((4), diff)
|
(4, diff)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let right = Self::read_byte(&mut cpu.bus, addr);
|
let right = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let diff = Self::sub_with_carry(left, right, flags.c(), &mut flags);
|
let diff = Self::sub_with_carry(left, right, flags.c(), &mut flags);
|
||||||
((8), diff)
|
(8, diff)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.set_register(CpuRegister::A, diff);
|
cpu.set_register(CpuRegister::A, diff);
|
||||||
|
@ -717,7 +717,7 @@ impl Instruction {
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let right = Self::read_byte(&mut cpu.bus, addr);
|
let right = Self::read_byte(&mut cpu.bus, addr);
|
||||||
((8), left & right)
|
(8, left & right)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.set_register(CpuRegister::A, acc);
|
cpu.set_register(CpuRegister::A, acc);
|
||||||
|
@ -743,7 +743,7 @@ impl Instruction {
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let right = Self::read_byte(&mut cpu.bus, addr);
|
let right = Self::read_byte(&mut cpu.bus, addr);
|
||||||
((8), left ^ right)
|
(8, left ^ right)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.set_register(CpuRegister::A, acc);
|
cpu.set_register(CpuRegister::A, acc);
|
||||||
|
@ -769,7 +769,7 @@ impl Instruction {
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let right = Self::read_byte(&mut cpu.bus, addr);
|
let right = Self::read_byte(&mut cpu.bus, addr);
|
||||||
((8), left | right)
|
(8, left | right)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.set_register(CpuRegister::A, acc);
|
cpu.set_register(CpuRegister::A, acc);
|
||||||
|
@ -1053,14 +1053,14 @@ impl Instruction {
|
||||||
let byte = cpu.register(reg);
|
let byte = cpu.register(reg);
|
||||||
let rotated = byte.rotate_left(1);
|
let rotated = byte.rotate_left(1);
|
||||||
cpu.set_register(reg, rotated);
|
cpu.set_register(reg, rotated);
|
||||||
((8), byte >> 7, rotated)
|
(8, byte >> 7, rotated)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let byte = Self::read_byte(&mut cpu.bus, addr);
|
let byte = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let rotated = byte.rotate_left(1);
|
let rotated = byte.rotate_left(1);
|
||||||
Self::write_byte(&mut cpu.bus, addr, rotated);
|
Self::write_byte(&mut cpu.bus, addr, rotated);
|
||||||
((16), byte >> 7, rotated)
|
(16, byte >> 7, rotated)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.update_flags(rotated == 0, false, false, most_sgfnt == 0x01);
|
cpu.update_flags(rotated == 0, false, false, most_sgfnt == 0x01);
|
||||||
|
@ -1076,14 +1076,14 @@ impl Instruction {
|
||||||
let byte = cpu.register(reg);
|
let byte = cpu.register(reg);
|
||||||
let rotated = byte.rotate_right(1);
|
let rotated = byte.rotate_right(1);
|
||||||
cpu.set_register(reg, rotated);
|
cpu.set_register(reg, rotated);
|
||||||
((8), byte & 0x01, rotated)
|
(8, byte & 0x01, rotated)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let byte = Self::read_byte(&mut cpu.bus, addr);
|
let byte = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let rotated = byte.rotate_right(1);
|
let rotated = byte.rotate_right(1);
|
||||||
Self::write_byte(&mut cpu.bus, addr, rotated);
|
Self::write_byte(&mut cpu.bus, addr, rotated);
|
||||||
((16), byte & 0x01, rotated)
|
(16, byte & 0x01, rotated)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.update_flags(rotated == 0, false, false, least_sgfnt == 0x01);
|
cpu.update_flags(rotated == 0, false, false, least_sgfnt == 0x01);
|
||||||
|
@ -1101,14 +1101,14 @@ impl Instruction {
|
||||||
let byte = cpu.register(reg);
|
let byte = cpu.register(reg);
|
||||||
let (rotated, carry) = Self::rl_thru_carry(byte, flags.c());
|
let (rotated, carry) = Self::rl_thru_carry(byte, flags.c());
|
||||||
cpu.set_register(reg, rotated);
|
cpu.set_register(reg, rotated);
|
||||||
((8), rotated, carry)
|
(8, rotated, carry)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let byte = Self::read_byte(&mut cpu.bus, addr);
|
let byte = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let (rotated, carry) = Self::rl_thru_carry(byte, flags.c());
|
let (rotated, carry) = Self::rl_thru_carry(byte, flags.c());
|
||||||
Self::write_byte(&mut cpu.bus, addr, rotated);
|
Self::write_byte(&mut cpu.bus, addr, rotated);
|
||||||
((16), rotated, carry)
|
(16, rotated, carry)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.update_flags(rotated == 0, false, false, carry);
|
cpu.update_flags(rotated == 0, false, false, carry);
|
||||||
|
@ -1126,14 +1126,14 @@ impl Instruction {
|
||||||
let byte = cpu.register(reg);
|
let byte = cpu.register(reg);
|
||||||
let (rotated, carry) = Self::rr_thru_carry(byte, flags.c());
|
let (rotated, carry) = Self::rr_thru_carry(byte, flags.c());
|
||||||
cpu.set_register(reg, rotated);
|
cpu.set_register(reg, rotated);
|
||||||
((8), rotated, carry)
|
(8, rotated, carry)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let byte = Self::read_byte(&mut cpu.bus, addr);
|
let byte = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let (rotated, carry) = Self::rr_thru_carry(byte, flags.c());
|
let (rotated, carry) = Self::rr_thru_carry(byte, flags.c());
|
||||||
Self::write_byte(&mut cpu.bus, addr, rotated);
|
Self::write_byte(&mut cpu.bus, addr, rotated);
|
||||||
((16), rotated, carry)
|
(16, rotated, carry)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.update_flags(rotated == 0, false, false, carry);
|
cpu.update_flags(rotated == 0, false, false, carry);
|
||||||
|
@ -1149,14 +1149,14 @@ impl Instruction {
|
||||||
let byte = cpu.register(reg);
|
let byte = cpu.register(reg);
|
||||||
let shifted = byte << 1;
|
let shifted = byte << 1;
|
||||||
cpu.set_register(reg, shifted);
|
cpu.set_register(reg, shifted);
|
||||||
((8), (byte >> 7) & 0x01, shifted)
|
(8, (byte >> 7) & 0x01, shifted)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let byte = Self::read_byte(&mut cpu.bus, addr);
|
let byte = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let shifted = byte << 1;
|
let shifted = byte << 1;
|
||||||
Self::write_byte(&mut cpu.bus, addr, shifted);
|
Self::write_byte(&mut cpu.bus, addr, shifted);
|
||||||
((16), (byte >> 7) & 0x01, shifted)
|
(16, (byte >> 7) & 0x01, shifted)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.update_flags(shifted == 0, false, false, most_sgfnt == 0x01);
|
cpu.update_flags(shifted == 0, false, false, most_sgfnt == 0x01);
|
||||||
|
@ -1172,14 +1172,14 @@ impl Instruction {
|
||||||
let byte = cpu.register(reg);
|
let byte = cpu.register(reg);
|
||||||
let shifted = ((byte >> 7) & 0x01) << 7 | byte >> 1;
|
let shifted = ((byte >> 7) & 0x01) << 7 | byte >> 1;
|
||||||
cpu.set_register(reg, shifted);
|
cpu.set_register(reg, shifted);
|
||||||
((8), byte & 0x01, shifted)
|
(8, byte & 0x01, shifted)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let byte = Self::read_byte(&mut cpu.bus, addr);
|
let byte = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let shifted = ((byte >> 7) & 0x01) << 7 | byte >> 1;
|
let shifted = ((byte >> 7) & 0x01) << 7 | byte >> 1;
|
||||||
Self::write_byte(&mut cpu.bus, addr, shifted);
|
Self::write_byte(&mut cpu.bus, addr, shifted);
|
||||||
((16), byte & 0x01, shifted)
|
(16, byte & 0x01, shifted)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.update_flags(shifted == 0, false, false, least_sgfnt == 0x01);
|
cpu.update_flags(shifted == 0, false, false, least_sgfnt == 0x01);
|
||||||
|
@ -1194,14 +1194,14 @@ impl Instruction {
|
||||||
let reg = reg.cpu_register();
|
let reg = reg.cpu_register();
|
||||||
let swapped = Self::swap_bits(cpu.register(reg));
|
let swapped = Self::swap_bits(cpu.register(reg));
|
||||||
cpu.set_register(reg, swapped);
|
cpu.set_register(reg, swapped);
|
||||||
((8), swapped)
|
(8, swapped)
|
||||||
}
|
}
|
||||||
|
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let swapped = Self::swap_bits(Self::read_byte(&mut cpu.bus, addr));
|
let swapped = Self::swap_bits(Self::read_byte(&mut cpu.bus, addr));
|
||||||
Self::write_byte(&mut cpu.bus, addr, swapped);
|
Self::write_byte(&mut cpu.bus, addr, swapped);
|
||||||
((16), swapped)
|
(16, swapped)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.update_flags(swapped == 0, false, false, false);
|
cpu.update_flags(swapped == 0, false, false, false);
|
||||||
|
@ -1217,14 +1217,14 @@ impl Instruction {
|
||||||
let byte = cpu.register(reg);
|
let byte = cpu.register(reg);
|
||||||
let shifted = byte >> 1;
|
let shifted = byte >> 1;
|
||||||
cpu.set_register(reg, shifted);
|
cpu.set_register(reg, shifted);
|
||||||
((8), byte & 0x01, shifted)
|
(8, byte & 0x01, shifted)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let byte = Self::read_byte(&mut cpu.bus, addr);
|
let byte = Self::read_byte(&mut cpu.bus, addr);
|
||||||
let shifted = byte >> 1;
|
let shifted = byte >> 1;
|
||||||
Self::write_byte(&mut cpu.bus, addr, shifted);
|
Self::write_byte(&mut cpu.bus, addr, shifted);
|
||||||
((16), byte & 0x01, shifted)
|
(16, byte & 0x01, shifted)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
cpu.update_flags(shift_reg == 0, false, false, least_sgfnt == 0x01);
|
cpu.update_flags(shift_reg == 0, false, false, least_sgfnt == 0x01);
|
||||||
|
@ -1239,12 +1239,12 @@ impl Instruction {
|
||||||
B | C | D | E | H | L | A => {
|
B | C | D | E | H | L | A => {
|
||||||
let reg = reg.cpu_register();
|
let reg = reg.cpu_register();
|
||||||
let byte = cpu.register(reg);
|
let byte = cpu.register(reg);
|
||||||
((8), ((byte >> bit) & 0x01) == 0x01)
|
(8, ((byte >> bit) & 0x01) == 0x01)
|
||||||
}
|
}
|
||||||
IndirectHL => {
|
IndirectHL => {
|
||||||
let addr = cpu.register_pair(RegisterPair::HL);
|
let addr = cpu.register_pair(RegisterPair::HL);
|
||||||
let byte = Self::read_byte(&mut cpu.bus, addr);
|
let byte = Self::read_byte(&mut cpu.bus, addr);
|
||||||
((12), ((byte >> bit) & 0x01) == 0x01)
|
(12, ((byte >> bit) & 0x01) == 0x01)
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
flags.set_z(!is_set);
|
flags.set_z(!is_set);
|
||||||
|
|
27
src/main.rs
27
src/main.rs
|
@ -1,12 +1,15 @@
|
||||||
use std::convert::TryInto;
|
use std::convert::TryInto;
|
||||||
|
|
||||||
use anyhow::{anyhow, Result};
|
use anyhow::Result;
|
||||||
use clap::{crate_authors, crate_description, crate_name, crate_version, App, Arg};
|
use clap::{crate_authors, crate_description, crate_name, crate_version, App, Arg};
|
||||||
use gb::emu::build::EmulatorBuilder;
|
use gb::emu::build::EmulatorBuilder;
|
||||||
|
use gb::emu::CYCLES_IN_FRAME;
|
||||||
use gb::{Cycle, GB_HEIGHT, GB_WIDTH};
|
use gb::{Cycle, GB_HEIGHT, GB_WIDTH};
|
||||||
use gilrs::Gilrs;
|
use gilrs::Gilrs;
|
||||||
use pixels::{PixelsBuilder, SurfaceTexture};
|
use pixels::{PixelsBuilder, SurfaceTexture};
|
||||||
use rodio::{OutputStream, Sink};
|
use rodio::{OutputStream, Sink};
|
||||||
|
use tracing::info;
|
||||||
|
use tracing_subscriber::EnvFilter;
|
||||||
use winit::dpi::{LogicalSize, PhysicalSize};
|
use winit::dpi::{LogicalSize, PhysicalSize};
|
||||||
use winit::event::{Event, VirtualKeyCode};
|
use winit::event::{Event, VirtualKeyCode};
|
||||||
use winit::event_loop::{ControlFlow, EventLoop};
|
use winit::event_loop::{ControlFlow, EventLoop};
|
||||||
|
@ -41,6 +44,15 @@ fn main() -> Result<()> {
|
||||||
)
|
)
|
||||||
.get_matches();
|
.get_matches();
|
||||||
|
|
||||||
|
// Set up subscriber
|
||||||
|
if std::env::var("RUST_LOG").is_err() {
|
||||||
|
std::env::set_var("RUST_LOG", "gb=info");
|
||||||
|
}
|
||||||
|
|
||||||
|
tracing_subscriber::fmt::fmt()
|
||||||
|
.with_env_filter(EnvFilter::from_default_env())
|
||||||
|
.init();
|
||||||
|
|
||||||
let mut emu_build =
|
let mut emu_build =
|
||||||
EmulatorBuilder::new().with_cart(m.value_of("rom").expect("ROM path provided"))?;
|
EmulatorBuilder::new().with_cart(m.value_of("rom").expect("ROM path provided"))?;
|
||||||
|
|
||||||
|
@ -51,9 +63,11 @@ fn main() -> Result<()> {
|
||||||
let mut emu = emu_build.finish();
|
let mut emu = emu_build.finish();
|
||||||
|
|
||||||
// Load Save file if it exists
|
// Load Save file if it exists
|
||||||
|
info!("Attempt to load .sav");
|
||||||
emu.try_load_sav().expect("Load save if exists");
|
emu.try_load_sav().expect("Load save if exists");
|
||||||
let rom_title = emu.title();
|
let rom_title = emu.title();
|
||||||
|
|
||||||
|
info!("Initialize Gamepad");
|
||||||
let mut gamepad = Gilrs::new().expect("Initialize Controller Support");
|
let mut gamepad = Gilrs::new().expect("Initialize Controller Support");
|
||||||
|
|
||||||
// Initialize GUI
|
// Initialize GUI
|
||||||
|
@ -84,6 +98,7 @@ fn main() -> Result<()> {
|
||||||
|
|
||||||
emu.set_prod(prod);
|
emu.set_prod(prod);
|
||||||
|
|
||||||
|
info!("Spawn Audio Thread");
|
||||||
std::thread::spawn(move || {
|
std::thread::spawn(move || {
|
||||||
sink.sleep_until_end();
|
sink.sleep_until_end();
|
||||||
});
|
});
|
||||||
|
@ -93,11 +108,7 @@ fn main() -> Result<()> {
|
||||||
|
|
||||||
event_loop.run(move |event, _, control_flow| {
|
event_loop.run(move |event, _, control_flow| {
|
||||||
if let Event::RedrawRequested(_) = event {
|
if let Event::RedrawRequested(_) = event {
|
||||||
if pixels
|
if pixels.render().is_err() {
|
||||||
.render()
|
|
||||||
.map_err(|e| anyhow!("pixels.render() failed: {}", e))
|
|
||||||
.is_err()
|
|
||||||
{
|
|
||||||
emu.try_write_sav().expect("Write game save if need be");
|
emu.try_write_sav().expect("Write game save if need be");
|
||||||
|
|
||||||
*control_flow = ControlFlow::Exit;
|
*control_flow = ControlFlow::Exit;
|
||||||
|
@ -119,8 +130,8 @@ fn main() -> Result<()> {
|
||||||
|
|
||||||
cycle_count += gb::emu::run_frame(&mut emu, &mut gamepad, &input);
|
cycle_count += gb::emu::run_frame(&mut emu, &mut gamepad, &input);
|
||||||
|
|
||||||
if cycle_count >= gb::emu::CYCLES_IN_FRAME {
|
if cycle_count >= CYCLES_IN_FRAME {
|
||||||
cycle_count %= gb::emu::CYCLES_IN_FRAME;
|
cycle_count %= CYCLES_IN_FRAME;
|
||||||
|
|
||||||
let buf: &mut [u8; GB_WIDTH * GB_HEIGHT * 4] = pixels
|
let buf: &mut [u8; GB_WIDTH * GB_HEIGHT * 4] = pixels
|
||||||
.get_frame()
|
.get_frame()
|
||||||
|
|
|
@ -413,7 +413,6 @@ impl Ppu {
|
||||||
self.pos.line_y = 0;
|
self.pos.line_y = 0;
|
||||||
self.stat.set_mode(PpuMode::HBlank);
|
self.stat.set_mode(PpuMode::HBlank);
|
||||||
|
|
||||||
// TODO: Is this an unnecessary performance hit?
|
|
||||||
let mut blank = WHITE.repeat(self.frame_buf.len() / 4);
|
let mut blank = WHITE.repeat(self.frame_buf.len() / 4);
|
||||||
self.frame_buf.swap_with_slice(&mut blank);
|
self.frame_buf.swap_with_slice(&mut blank);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue