paoda
/
gb
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

chore: replace select unreachable! macros with todo! and unreachable!

This commit is contained in:
Rekai Nyangadzayi Musuka 2021-03-22 21:52:28 -05:00
parent 9301a36682
commit 2813b762dd
3 changed files with 7 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/bus.rs
View File

@ -120,7 +120,7 @@ impl Bus {
// Sprite Attribute Table // Sprite Attribute Table
unimplemented!("Unable to read {:#06X} in the Sprite Attribute Table", addr); unimplemented!("Unable to read {:#06X} in the Sprite Attribute Table", addr);
} }
0xFEA0..=0xFEFF => unimplemented!("{:#06X} is not allowed to be used", addr), 0xFEA0..=0xFEFF => unreachable!("{:#06X} is not allowed to be used", addr),
0xFF00..=0xFF7F => { 0xFF00..=0xFF7F => {
// IO Registers // IO Registers
match addr { match addr {
@ -204,12 +204,9 @@ impl Bus {
} }
0xFE00..=0xFE9F => { 0xFE00..=0xFE9F => {
// Sprite Attribute Table // Sprite Attribute Table
unimplemented!( unimplemented!("Unable to write to {:#06X} in Sprite Attribute Table", addr);
"Unable to write to {:#06X} in the Sprite Attribute Table",
addr
);
} }
0xFEA0..=0xFEFF => unimplemented!("{:#06X} is not allowed to be used", addr), 0xFEA0..=0xFEFF => unreachable!("{:#06X} is not allowed to be used", addr),
0xFF00..=0xFF7F => { 0xFF00..=0xFF7F => {
// IO Registers // IO Registers
match addr { match addr {

4
src/cartridge.rs
View File

@ -187,7 +187,7 @@ impl MemoryBankController for MBC1 {
Value(0xFF) Value(0xFF)
} }
} }
_ => unimplemented!(), _ => unreachable!("A read from {:#06X} should not be handled by MBC1", addr),
} }
} }
@ -209,7 +209,7 @@ impl MemoryBankController for MBC1 {
self.ram[ram_addr as usize] = byte; self.ram[ram_addr as usize] = byte;
} }
} }
_ => unreachable!("{:#06X} should not be handled by MBC1", addr), _ => unreachable!("A write to {:#06X} should not be handled by MBC1", addr),
} }
} }
} }

4
src/instruction.rs
View File

@ -541,7 +541,7 @@ impl Instruction {
cpu.set_register(Register::A, rot_a); cpu.set_register(Register::A, rot_a);
Cycles::new(4) Cycles::new(4)
} }
Instruction::DAA => unimplemented!(), Instruction::DAA => todo!("Implement DAA Instruction"),
Instruction::CPL => { Instruction::CPL => {
// Compliment A register (inverse) // Compliment A register (inverse)
let mut flags: Flags = *cpu.flags(); let mut flags: Flags = *cpu.flags();
@ -576,7 +576,7 @@ impl Instruction {
cpu.set_flags(flags); cpu.set_flags(flags);
Cycles::new(4) Cycles::new(4)
} }
Instruction::HALT => unimplemented!(), Instruction::HALT => todo!("Implement HALT instruction"),
Instruction::ADC(target) => match target { Instruction::ADC(target) => match target {
MATHTarget::Register(reg) => { MATHTarget::Register(reg) => {
// ADC A, r[z] | Add register r[z] plus the Carry flag to A // ADC A, r[z] | Add register r[z] plus the Carry flag to A