feat: stub 0xff0f and 0xffff from interrupt

This commit is contained in:
Rekai Nyangadzayi Musuka 2021-01-03 01:38:31 -06:00 committed by Rekai Musuka
parent e693ad8a3c
commit 1b53363095
3 changed files with 83 additions and 2 deletions

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@ -1,7 +1,9 @@
use super::cartridge::Cartridge; use super::cartridge::Cartridge;
use super::interrupt::Interrupt;
use super::ppu::PPU; use super::ppu::PPU;
use super::timer::Timer; use super::timer::Timer;
use super::work_ram::{VariableWorkRAM, WorkRAM}; use super::work_ram::{VariableWorkRAM, WorkRAM};
#[derive(Debug, Clone)] #[derive(Debug, Clone)]
pub struct Bus { pub struct Bus {
boot: Option<[u8; 256]>, // Boot ROM is 256b long boot: Option<[u8; 256]>, // Boot ROM is 256b long
@ -10,6 +12,7 @@ pub struct Bus {
wram: WorkRAM, wram: WorkRAM,
vwram: VariableWorkRAM, vwram: VariableWorkRAM,
timer: Timer, timer: Timer,
interrupt: Interrupt,
} }
impl Default for Bus { impl Default for Bus {
@ -21,6 +24,7 @@ impl Default for Bus {
wram: Default::default(), wram: Default::default(),
vwram: Default::default(), vwram: Default::default(),
timer: Default::default(), timer: Default::default(),
interrupt: Default::default(),
} }
} }
} }
@ -91,6 +95,7 @@ impl Bus {
// IO Registers // IO Registers
match addr { match addr {
0xFF07 => self.timer.control.into(), 0xFF07 => self.timer.control.into(),
0xFF0F => self.interrupt.flag.into(),
_ => unimplemented!("Unable to read {:#06X} in I/O Registers", addr), _ => unimplemented!("Unable to read {:#06X} in I/O Registers", addr),
} }
} }
@ -100,7 +105,7 @@ impl Bus {
} }
0xFFFF => { 0xFFFF => {
// Interupts Enable Register // Interupts Enable Register
unimplemented!("Unable to read IE Register {:#06X} ", addr); self.interrupt.enable.into()
} }
} }
} }
@ -147,6 +152,7 @@ impl Bus {
// IO Registers // IO Registers
match addr { match addr {
0xFF07 => self.timer.control = byte.into(), 0xFF07 => self.timer.control = byte.into(),
0xFF0F => self.interrupt.flag = byte.into(),
_ => unimplemented!("Unable to write to {:#06X} in I/O Registers", addr), _ => unimplemented!("Unable to write to {:#06X} in I/O Registers", addr),
}; };
} }
@ -156,7 +162,7 @@ impl Bus {
} }
0xFFFF => { 0xFFFF => {
// Interupts Enable Register // Interupts Enable Register
unimplemented!("Unable to write to IE Register {:#06X} ", addr); self.interrupt.enable = byte.into();
} }
} }
} }

74
src/interrupt.rs Normal file
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@ -0,0 +1,74 @@
#[derive(Debug, Clone, Copy, Default)]
pub struct Interrupt {
pub flag: InterruptFlag,
pub enable: InterruptEnable,
}
#[derive(Debug, Clone, Copy, Default)]
pub struct InterruptEnable {
vblank: bool,
lcd_stat: bool,
timer: bool,
serial: bool,
joypad: bool,
}
impl From<u8> for InterruptEnable {
fn from(byte: u8) -> Self {
Self {
vblank: (byte >> 0 & 0x01) == 0x01,
lcd_stat: (byte >> 1 & 0x01) == 0x01,
timer: (byte >> 2 & 0x01) == 0x01,
serial: (byte >> 3 & 0x01) == 0x01,
joypad: (byte >> 4 & 0x01) == 0x01,
}
}
}
impl From<InterruptEnable> for u8 {
fn from(flag: InterruptEnable) -> Self {
(flag.joypad as u8) << 4
| (flag.serial as u8) << 3
| (flag.timer as u8) << 2
| (flag.lcd_stat as u8) << 1
| (flag.vblank as u8) << 0
}
}
#[derive(Debug, Clone, Copy, Default)]
pub struct InterruptFlag {
vblank: bool,
lcd_stat: bool,
timer: bool,
serial: bool,
joypad: bool,
}
impl From<u8> for InterruptFlag {
fn from(byte: u8) -> Self {
Self {
vblank: (byte >> 0 & 0x01) == 0x01,
lcd_stat: (byte >> 1 & 0x01) == 0x01,
timer: (byte >> 2 & 0x01) == 0x01,
serial: (byte >> 3 & 0x01) == 0x01,
joypad: (byte >> 4 & 0x01) == 0x01,
}
}
}
impl From<InterruptFlag> for u8 {
fn from(flag: InterruptFlag) -> Self {
(flag.joypad as u8) << 4
| (flag.serial as u8) << 3
| (flag.timer as u8) << 2
| (flag.lcd_stat as u8) << 1
| (flag.vblank as u8) << 0
}
}
enum InterruptType {
VBlank,
LCDStat,
Timer,
Serial,
Joypad,
}

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@ -2,6 +2,7 @@ mod bus;
mod cartridge; mod cartridge;
pub mod cpu; pub mod cpu;
mod instruction; mod instruction;
mod interrupt;
mod ppu; mod ppu;
mod timer; mod timer;
mod work_ram; mod work_ram;