Implement more instrucitons
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49dac85470
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11d2d26cdc
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@ -137,7 +137,14 @@ impl Instruction {
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InstrRegister::IndirectC => unreachable!(),
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}
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}
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(LDTarget::Register(lhs), LDTarget::Register(rhs)) => unimplemented!(),
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(LDTarget::Register(lhs), LDTarget::Register(rhs)) => {
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// LD r[y], r[z] | Store value of RHS Register in LHS Register
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// FIXME: panicking is the right thing to do, but maybe .unwrap is too unclear?
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let rhs_value = cpu.register(Register::try_from(rhs).unwrap());
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cpu.set_register(Register::try_from(lhs).unwrap(), rhs_value);
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Cycles(4)
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}
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_ => unimplemented!(),
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},
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Instruction::STOP => Cycles(4),
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@ -205,6 +212,35 @@ impl Instruction {
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cpu.set_register(Register::Flag, flags.into());
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Cycles(8)
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}
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(MATHTarget::Register(InstrRegister::A), MATHTarget::Register(reg)) => {
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let a_value = cpu.register(Register::A);
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let sum;
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let cycles: Cycles;
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match reg {
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InstrRegister::B
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| InstrRegister::C
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| InstrRegister::D
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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sum = Self::add_u8s(a_value, value, &mut flags);
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cycles = Cycles(8);
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}
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InstrRegister::IndirectHL => {
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let value = cpu.read_byte(cpu.register_pair(RegisterPair::HL));
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sum = Self::add_u8s(a_value, value, &mut flags);
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cycles = Cycles(4);
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}
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InstrRegister::IndirectC => unimplemented!(),
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}
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cpu.set_register(Register::A, sum);
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cpu.set_register(Register::Flag, flags.into());
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cycles
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}
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_ => unimplemented!(),
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},
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Instruction::INC(Registers::Word(pair)) => {
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@ -382,33 +418,315 @@ impl Instruction {
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cpu.set_register(Register::Flag, flags.into());
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Cycles(4)
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}
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Instruction::HALT => unimplemented!(),
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Instruction::ADC(lhs, rhs) => match (lhs, rhs) {
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(MATHTarget::Register(InstrRegister::A), MATHTarget::Register(reg)) => {
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let a_value = cpu.register(Register::A);
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let cycles: Cycles;
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let sum;
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match reg {
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InstrRegister::B
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| InstrRegister::C
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| InstrRegister::D
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::A => {
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let value =
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cpu.register(Register::try_from(reg).unwrap()) + (flags.c as u8);
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sum = Self::add_u8s(a_value, value, &mut flags);
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cycles = Cycles(4);
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}
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InstrRegister::IndirectHL => {
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let value = cpu.read_byte(cpu.register_pair(RegisterPair::HL));
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sum = Self::add_u8s(a_value, value, &mut flags);
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cycles = Cycles(8);
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}
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InstrRegister::IndirectC => unreachable!(),
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}
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cpu.set_register(Register::Flag, flags.into());
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cpu.set_register(Register::A, sum);
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cycles
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}
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_ => unimplemented!(),
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},
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Instruction::SUB(target) => match target {
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MATHTarget::Register(reg) => {
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let a_value = cpu.register(Register::A);
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let cycles: Cycles;
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let diff;
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match reg {
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InstrRegister::B
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| InstrRegister::C
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| InstrRegister::D
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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diff = Self::sub_u8s(a_value, value, &mut flags);
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cycles = Cycles(4);
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}
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InstrRegister::IndirectHL => {
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let value = cpu.read_byte(cpu.register_pair(RegisterPair::HL));
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diff = Self::sub_u8s(a_value, value, &mut flags);
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cycles = Cycles(8);
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}
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InstrRegister::IndirectC => unreachable!(),
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}
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cpu.set_register(Register::Flag, flags.into());
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cpu.set_register(Register::A, diff);
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cycles
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}
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MATHTarget::ImmediateByte(byte) => unimplemented!(),
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_ => unreachable!(),
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},
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Instruction::SBC(lhs, rhs) => match (lhs, rhs) {
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// TODO: Does SBC actually have anything other than the A register on the LHS?
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(MATHTarget::Register(InstrRegister::A), MATHTarget::Register(reg)) => {
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let a_value = cpu.register(Register::A);
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let cycles: Cycles;
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let diff;
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match reg {
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InstrRegister::B
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| InstrRegister::C
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| InstrRegister::D
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::A => {
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let value =
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cpu.register(Register::try_from(reg).unwrap()) + (flags.c as u8);
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diff = Self::sub_u8s(a_value, value, &mut flags);
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cycles = Cycles(4);
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}
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InstrRegister::IndirectHL => {
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let value = cpu.read_byte(cpu.register_pair(RegisterPair::HL));
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diff = Self::sub_u8s(a_value, value, &mut flags);
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cycles = Cycles(8);
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}
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InstrRegister::IndirectC => unreachable!(),
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}
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cpu.set_register(Register::A, diff);
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cpu.set_register(Register::Flag, flags.into());
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cycles
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}
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_ => unimplemented!(),
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},
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Instruction::AND(target) => match target {
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MATHTarget::Register(reg) => {
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let a_value = cpu.register(Register::A);
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let cycles: Cycles;
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let result;
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match reg {
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InstrRegister::B
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| InstrRegister::C
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| InstrRegister::D
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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result = a_value & value;
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cycles = Cycles(4);
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}
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InstrRegister::IndirectHL => {
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let value = cpu.read_byte(cpu.register_pair(RegisterPair::HL));
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result = a_value & value;
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cycles = Cycles(8);
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}
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InstrRegister::IndirectC => unreachable!(),
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}
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flags.z = result == 0;
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flags.n = false;
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flags.h = true;
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flags.c = false;
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cpu.set_register(Register::Flag, flags.into());
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cpu.set_register(Register::A, result);
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cycles
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}
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MATHTarget::ImmediateByte(byte) => unimplemented!(),
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_ => unreachable!(),
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},
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Instruction::XOR(target) => match target {
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MATHTarget::Register(reg) => {
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let a_value = cpu.register(Register::A);
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let cycles: Cycles;
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let result;
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match reg {
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InstrRegister::B
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| InstrRegister::C
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| InstrRegister::D
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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result = a_value ^ value;
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cycles = Cycles(4);
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}
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InstrRegister::IndirectHL => {
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let value = cpu.read_byte(cpu.register_pair(RegisterPair::HL));
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result = a_value ^ value;
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cycles = Cycles(8);
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}
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InstrRegister::IndirectC => unreachable!(),
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}
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flags.z = result == 0;
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flags.n = false;
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flags.h = false;
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flags.c = false;
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cpu.set_register(Register::Flag, flags.into());
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cpu.set_register(Register::A, result);
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cycles
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}
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MATHTarget::ImmediateByte(byte) => unimplemented!(),
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_ => unreachable!(),
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},
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Instruction::OR(target) => match target {
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MATHTarget::Register(reg) => {
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let a_value = cpu.register(Register::A);
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let cycles: Cycles;
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let result;
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match reg {
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InstrRegister::B
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| InstrRegister::C
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| InstrRegister::D
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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result = a_value | value;
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cycles = Cycles(4);
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}
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InstrRegister::IndirectHL => {
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let value = cpu.read_byte(cpu.register_pair(RegisterPair::HL));
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result = a_value | value;
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cycles = Cycles(8);
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}
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InstrRegister::IndirectC => unreachable!(),
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}
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flags.z = result == 0;
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flags.n = false;
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flags.h = false;
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flags.c = false;
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cpu.set_register(Register::Flag, flags.into());
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cpu.set_register(Register::A, result);
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cycles
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}
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MATHTarget::ImmediateByte(byte) => unimplemented!(),
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_ => unreachable!(),
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},
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Instruction::CP(target) => match target {
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MATHTarget::Register(reg) => {
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let mut flags: Flags = cpu.register(Register::Flag).into();
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let a_value = cpu.register(Register::A);
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let cycles: Cycles;
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match reg {
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InstrRegister::B
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| InstrRegister::C
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| InstrRegister::D
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| InstrRegister::E
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| InstrRegister::H
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| InstrRegister::L
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| InstrRegister::A => {
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let value = cpu.register(Register::try_from(reg).unwrap());
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let _ = Self::sub_u8s(a_value, value, &mut flags);
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cycles = Cycles(4);
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}
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InstrRegister::IndirectHL => {
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let value = cpu.read_byte(cpu.register_pair(RegisterPair::HL));
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let _ = Self::sub_u8s(a_value, value, &mut flags);
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cycles = Cycles(8);
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}
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InstrRegister::IndirectC => unreachable!(),
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}
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cpu.set_register(Register::Flag, flags.into());
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cycles
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}
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MATHTarget::ImmediateByte(byte) => unimplemented!(),
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_ => unreachable!(),
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},
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_ => unimplemented!(),
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}
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}
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fn dec_register(reg: u8, flags: &mut Flags) -> u8 {
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let res = reg - 1;
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flags.z = res == 0;
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flags.n = true;
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flags.h = !Self::u8_half_carry(res, 1); // FIXME: Is this right?
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res
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Self::sub_u8s_no_carry(reg, 1, flags)
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}
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fn inc_register(reg: u8, flags: &mut Flags) -> u8 {
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let res = reg + 1;
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Self::add_u8s_no_carry(reg, 1, flags)
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}
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flags.z = res == 0;
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fn sub_u8s_no_carry(left: u8, right: u8, flags: &mut Flags) -> u8 {
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let diff = left.wrapping_sub(right);
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flags.z = diff == 0;
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flags.n = true;
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flags.h = Self::u8_half_carry(left, right);
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diff
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}
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fn sub_u8s(left: u8, right: u8, flags: &mut Flags) -> u8 {
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let (diff, did_overflow) = left.overflowing_sub(right);
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flags.z = diff == 0;
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flags.n = true;
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flags.h = Self::u8_half_carry(left, right);
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flags.c = did_overflow;
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diff
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}
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fn add_u8s_no_carry(left: u8, right: u8, flags: &mut Flags) -> u8 {
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let sum = left.wrapping_add(right);
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flags.z = sum == 0;
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flags.n = false;
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flags.h = Self::u8_half_carry(reg, 1);
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flags.h = Self::u8_half_carry(left, right);
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res
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sum
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}
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fn add_u8s(left: u8, right: u8, flags: &mut Flags) -> u8 {
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let (sum, did_overflow) = left.overflowing_add(right);
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flags.z = sum == 0;
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flags.n = false;
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flags.h = Self::u8_half_carry(left, right);
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flags.c = did_overflow;
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sum
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}
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fn add_u16s(left: u16, right: u16, flags: &mut Flags) -> u16 {
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let (sum, did_overflow) = left.overflowing_add(right);
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flags.n = false;
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flags.h = Self::u16_half_carry(left, right);
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flags.c = did_overflow;
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