Stub 8-bit LD Instructions
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src/cpu.rs
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src/cpu.rs
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use super::instructions::Instruction;
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// Gameboy CPU
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// Gameboy CPU
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pub struct LR35902 {
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pub struct LR35902 {
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sp: u16,
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sp: u16,
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pc: u16,
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pc: u16,
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reg: Registers,
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}
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impl LR35902 {
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pub fn cycle(&mut self) {
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let opcode = Self::fetch();
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self.decode(opcode);
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Self::execute();
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}
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fn fetch() -> u8 {
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unimplemented!()
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}
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fn decode(&mut self, opcode: u8) {
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// Source: https://gb-archive.github.io/salvage/decoding_gbz80_opcodes/Decoding%20Gamboy%20Z80%20Opcodes.html
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// x = the opcode's 1st octal digit (i.e. bits 7-6)
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// y = the opcode's 2nd octal digit (i.e. bits 5-3)
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// z = the opcode's 3rd octal digit (i.e. bits 2-0)
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// p = y rightshifted one position (i.e. bits 5-4)
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// q = y modulo 2 (i.e. bit 3)
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let x = opcode >> 6;
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let y = (opcode & 0b00111000) >> 3; // 0b00111000 = 0x38
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let z = opcode & 0b00000111; // 0b00000111 = 0x07
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let p = y >> 1;
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let q = y & 0b00000001; // 0b001 = 0x1;
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let d: i8 = 0; // Displacement Byte
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let n: u8 = 0; // 8-bit Immediate Operand
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let nn: u16 = 0; // 16-bit Immediate Operand
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match (x, z, q, y, p) {
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(0, 0, _, 0, _) => Instruction::nop(),
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_ => panic!("Unexpected Opcode!"),
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}
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}
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fn execute() {
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unimplemented!()
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}
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}
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}
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#[derive(Debug, Copy, Clone, Default)]
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#[derive(Debug, Copy, Clone, Default)]
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@ -0,0 +1,136 @@
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/// Sharp SM83 Instructions
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/// ### Definitions
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/// * "Any valid 8-bit register" refers to the registers `B`, `C`, `D`, `E`, `H` and `L`.
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/// * If `A` is also a valid register, it will be **explicity** stated as such.
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/// * "Any valid 16-bit register" refers to the registers BC, DE and HL.
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/// * If `AF` is a valid register, it will be **explicitly** stated as such.
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/// * If `SP` is a valid register, it will be **explicity** stated as such.
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/// * the value of any 16-bit register in brackets is the value of the data located at
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/// the address of the 16-bit register.
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/// * e.g. the value of `(HL)` would be what is at `memory[cpu.reg.get_hl()]`
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/// * Since the value is from memory, the value is an 8-bit integer.
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pub struct Instruction {}
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impl Instruction {
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// *** 8-bit Loads ***
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/// `LD nn, n` Store value nn in n.
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/// ### Arguments
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/// * `nn` Any valid 8-bit or 16-bit register (including `SP`).
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/// * `n` An 8-bit immediate value.
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pub fn ld_nn_n(nn: u16, n: &mut u8) {
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unimplemented!()
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}
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/// `LD r, r` Store value r2 into r1.
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/// ### Arguments
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/// * `r1` Any valid 8-bit register (including `A`), and `(HL)`.
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/// * `r2` Any valid 8-bit register (including `A`), and `(HL)`.
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pub fn ld_r1_r2(r1: &mut u8, r2: u8) {
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unimplemented!()
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}
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/// `LD A, n` Store value n into register A.
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/// ### Arguments
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/// * `A` The A register
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/// * `n` Any valid 8-bit register (including `A`),`(BC)`, `(DE)`, `(HL)`, `(nn)`, and #.
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/// * `nn` A two byte immediate value (Least significant byte first).
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pub fn ld_A_n(A: &mut u8, n: u8) {
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unimplemented!()
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}
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/// `LD n, A` Store register A into n.
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/// ### Arguments
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/// * `n` Any valid 8-bit register (including `A`), `(BC)`, `(DE)`, `(HL)`, and `(nn)`.
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/// * `nn` A two byte immediate value (Least significant byte first).
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/// * `A` The A register.
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pub fn ld_n_A(n: &mut u8, A: u8) {
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unimplemented!()
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}
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/// `LD A, (C)` Store value at $FF00 + register C in register A.
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/// ### Arguments
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/// * `A` The A register.
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/// * `C` The C register.
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pub fn ld_A_C(A: &mut u8, C: u8) {
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unimplemented!()
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}
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/// `LD (C) ,A` Store the value of register A into $FF00 + register C.
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/// ### Arguments
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/// * `C` The C register.
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/// * `A` The A register.
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pub fn ld_C_A(C: u8, A: u8) {
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unimplemented!()
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}
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// `LD A, (HLD)` is identical to `LDD A, (HL)`.
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// `LD A, (HL-)` is identical to `LDD A, (HL)`.
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/// `LDD A, (HL)` Put value at $HL into A, then decrement HL.
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///
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/// Identical to `LD A, (HLD)`, and `LD A, (HL-)`.
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/// ### Arguments
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/// * `A The A register.
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/// * `HL` The HL register
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pub fn ldd_A_HL(A: &mut u8, HL: u16) {
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unimplemented!()
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}
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// `LD (HLD), A` is identical to `LDD (HL), A`.
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// `LD (HL-), A` is identical to `LDD (HL), A`.
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/// `LDD (HL), A` Store register A in $HL, then decrement HL.
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///
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/// Identical to `LD (HLD), A`, and `LD (HL-), A`
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/// ### Arguments
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/// * `HL` The HL register.
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/// * `A` The A register.
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pub fn ldd_HL_A(HL: u16, A: u8) {
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unimplemented!()
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}
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// `LD A, (HLI)` is identical to `LDI A, (HL)`.
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// `LD A, (HL+)` is identical to `LDI A, (HL)`.
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/// `LDI A, (HL)` Store value at $HL in register A, then increment HL.
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///
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/// Identical to `LD A, (HLI)`, and `LD A, (HL+)`.
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/// ### Arguments
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/// * `A` The A register.
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/// * `HL` The HL register.
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pub fn ldi_A_HL(A: &mut u8, HL: u16) {
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unimplemented!()
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}
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// `LD (HLI), A` is identical to `LDI (HL), A`.
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// `LD (HL+), A` is identical to `LDI (HL), A`.
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/// `LDI (HL), A` Store register A in $HL, then increment HL.
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///
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/// Identical to `LD (HLI), A`, and `LD (HL+), A`.
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/// ### Arguments
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/// * `HL` The HL register.
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/// * `A` The A register.
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pub fn ldi_HL_A(HL: u16, A: u8) {
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unimplemented!()
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}
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/// `LDH (n), A` Store register A into address $FF00 + n.
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/// ### Arguments
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/// * `n` An 8-bit immediate value.
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/// * `A` The A register.
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pub fn ldh_n_A(n: u8, A: u8) {
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unimplemented!()
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}
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/// `LDH A, (n)` Store address $FF00 + n in the A register.
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/// ### Arguments
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/// * `A` The A register.
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/// * `n` An 8-bit immediate value
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pub fn ldh_A_n(A: &mut u8, n: u8) {
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unimplemented!()
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}
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// *** 16-bit Loads ***
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}
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@ -1 +1,2 @@
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pub mod cpu;
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pub mod cpu;
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pub mod instructions;
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