arm32/src/arm/cpu/thumb/data_transfer.zig

174 lines
6.2 KiB
Zig

const rotr = @import("zba-util").rotr;
const sext = @import("zba-util").sext;
const alignAddr = @import("zba-util").alignAddr;
pub fn fmt6(comptime InstrFn: type, comptime rd: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: *Arm32, opcode: u16) void {
// LDR
const offset = (opcode & 0xFF) << 2;
// Bit 1 of the PC intentionally ignored
cpu.r[rd] = cpu.read(u32, (cpu.r[15] & ~@as(u32, 2)) + offset);
}
}.inner;
}
pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn {
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: *Arm32, opcode: u16) void {
const ro = opcode >> 6 & 0x7;
const rb = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
const address = cpu.r[rb] +% cpu.r[ro];
if (T) {
// Format 8
switch (op) {
0b00 => {
// STRH
// FIXME: I shouldn't have to use @as(u8, ...) here
cpu.write(u16, address, @as(u16, @truncate(cpu.r[rd])));
},
0b01 => {
// LDSB
cpu.r[rd] = sext(u32, u8, cpu.read(u8, address));
},
0b10 => {
// LDRH
cpu.r[rd] = switch (Arm32.arch) {
.v4t => rotr(u32, cpu.read(u16, address), 8 * (address & 1)),
.v5te => cpu.read(u16, alignAddr(u16, address)),
};
},
0b11 => {
// LDRSH
cpu.r[rd] = switch (Arm32.arch) {
.v4t => blk: {
const value = cpu.read(u16, address);
break :blk switch (address & 1 == 1) {
true => sext(u32, u8, @as(u8, @truncate(value >> 8))),
false => sext(u32, u16, value),
};
},
.v5te => sext(u32, u16, cpu.read(u16, alignAddr(u16, address))),
};
},
}
} else {
// Format 7
switch (op) {
0b00 => {
// STR
cpu.write(u32, address, cpu.r[rd]);
},
0b01 => {
// STRB
// FIXME: I shouldn't have to use @as(u8, ...) here
cpu.write(u8, address, @as(u8, @truncate(cpu.r[rd])));
},
0b10 => {
// LDR
const value = cpu.read(u32, address);
cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
},
0b11 => {
// LDRB
cpu.r[rd] = cpu.read(u8, address);
},
}
}
}
}.inner;
}
pub fn fmt9(comptime InstrFn: type, comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn {
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: *Arm32, opcode: u16) void {
const rb = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
if (L) {
if (B) {
// LDRB
const address = cpu.r[rb] + offset;
cpu.r[rd] = cpu.read(u8, address);
} else {
// LDR
const address = cpu.r[rb] + (@as(u32, offset) << 2);
const value = cpu.read(u32, address);
cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
}
} else {
if (B) {
// STRB
const address = cpu.r[rb] + offset;
// FIXME: I shouldn't have to use @as(u8, ...) here
cpu.write(u8, address, @as(u8, @truncate(cpu.r[rd])));
} else {
// STR
const address = cpu.r[rb] + (@as(u32, offset) << 2);
cpu.write(u32, address, cpu.r[rd]);
}
}
}
}.inner;
}
pub fn fmt10(comptime InstrFn: type, comptime L: bool, comptime offset: u5) InstrFn {
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: *Arm32, opcode: u16) void {
const rb = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
const address = cpu.r[rb] + (@as(u6, offset) << 1);
if (L) {
// LDRH
cpu.r[rd] = switch (Arm32.arch) {
.v4t => rotr(u32, cpu.read(u16, address), 8 * (address & 1)),
.v5te => cpu.read(u16, alignAddr(u16, address)),
};
} else {
// STRH
// FIXME: I shouldn't have to use @as(u8, ...) here
cpu.write(u16, address, @as(u16, @truncate(cpu.r[rd])));
}
}
}.inner;
}
pub fn fmt11(comptime InstrFn: type, comptime L: bool, comptime rd: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: *Arm32, opcode: u16) void {
const offset = (opcode & 0xFF) << 2;
const address = cpu.r[13] + offset;
if (L) {
// LDR
const value = cpu.read(u32, address);
cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
} else {
// STR
cpu.write(u32, address, cpu.r[rd]);
}
}
}.inner;
}