arm32/src/arm/cpu/thumb/block_data_transfer.zig

103 lines
2.9 KiB
Zig

pub fn fmt14(comptime InstrFn: type, comptime L: bool, comptime R: bool) InstrFn {
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: *Arm32, opcode: u16) void {
const count = @intFromBool(R) + countRlist(opcode);
const start = cpu.r[13] - if (!L) count * 4 else 0;
var end = cpu.r[13];
if (L) {
end += count * 4;
} else {
end -= 4;
}
var address = start;
var i: u4 = 0;
while (i < 8) : (i += 1) {
if (opcode >> i & 1 == 1) {
if (L) {
cpu.r[i] = cpu.read(u32, address);
} else {
cpu.write(u32, address, cpu.r[i]);
}
address += 4;
}
}
if (R) {
if (L) {
const value = cpu.read(u32, address);
cpu.r[15] = value & ~@as(u32, 1);
if (Arm32.arch == .v5te) cpu.cpsr.t.write(value & 1 == 1);
cpu.pipe.reload(cpu);
} else {
cpu.write(u32, address, cpu.r[14]);
}
address += 4;
}
cpu.r[13] = if (L) end else start;
}
}.inner;
}
pub fn fmt15(comptime InstrFn: type, comptime L: bool, comptime rb: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: *Arm32, opcode: u16) void {
var address = cpu.r[rb];
const end_address = cpu.r[rb] + 4 * countRlist(opcode);
if (opcode & 0xFF == 0) {
if (L) {
cpu.r[15] = cpu.read(u32, address);
cpu.pipe.reload(cpu);
} else {
cpu.write(u32, address, cpu.r[15] + 2);
}
cpu.r[rb] += 0x40;
return;
}
var i: u4 = 0;
var first_write = true;
while (i < 8) : (i += 1) {
if (opcode >> i & 1 == 1) {
if (L) {
cpu.r[i] = cpu.read(u32, address);
} else {
cpu.write(u32, address, cpu.r[i]);
}
if (!L and first_write) {
cpu.r[rb] = end_address;
first_write = false;
}
address += 4;
}
}
if (L and opcode >> rb & 1 != 1) cpu.r[rb] = address;
}
}.inner;
}
inline fn countRlist(opcode: u16) u32 {
var count: u32 = 0;
inline for (0..8) |i| {
if (opcode >> (7 - i) & 1 == 1) count += 1;
}
return count;
}