chore: expose arm namespace

src/arm.zig

@@ -84,7 +84,7 @@ pub fn Arm32(comptime arch: Architecture) type {
         };
 
         /// Bank of Registers from other CPU Modes
-        pub const Bank = struct {
+        const Bank = struct {
             /// Storage for r13_<mode>, r14_<mode>
             /// e.g. [r13, r14, r13_svc, r14_svc]
             r: [2 * 6]u32,
@@ -259,6 +259,29 @@ pub fn Arm32(comptime arch: Architecture) type {
             self.cpsr.mode.write(@enumToInt(next));
         }
 
+        /// Advances state so that the BIOS is skipped
+        ///
+        /// Note: This accesses the CPU's bus ptr so it only may be called
+        /// once the Bus has been properly initialized
+        ///
+        /// TODO: Make above notice impossible to do in code
+        pub fn fastBoot(self: *Self) void {
+            self.r = std.mem.zeroes([16]u32);
+
+            // self.r[0] = 0x08000000;
+            // self.r[1] = 0x000000EA;
+            self.r[13] = 0x0300_7F00;
+            self.r[15] = 0x0800_0000;
+
+            self.bank.r[Bank.regIdx(.Irq, .R13)] = 0x0300_7FA0;
+            self.bank.r[Bank.regIdx(.Supervisor, .R13)] = 0x0300_7FE0;
+
+            // self.cpsr.raw = 0x6000001F;
+            self.cpsr.raw = 0x0000_001F;
+
+            self.bus.bios.addr_latch = 0x0000_00DC + 8;
+        }
+
         pub fn step(self: *Self) void {
             defer {
                 if (!self.pipe.flushed) self.r[15] += if (self.cpsr.t.read()) 2 else @as(u32, 4);