|
502647806c
|
feat(v5te): stub THUMB BKPT
|
2023-09-20 00:29:44 -05:00 |
|
|
3c5d4acc5f
|
feat(v5te): implement THUMB BLX(1), BLX(2), and ARM BLX
|
2023-09-20 00:29:42 -05:00 |
|
|
30cf951d2a
|
feat: integrate cp15 and TCM code
|
2023-09-15 14:20:24 -05:00 |
|
|
5d70e4bd1d
|
chore(v4t,v5te): don't give SWP/SWPB its own separate handler
|
2023-09-09 03:39:21 -05:00 |
|
|
819eace2a7
|
feat: implement QADD/QSUB
|
2023-09-07 03:39:51 -05:00 |
|
|
177f9b55a9
|
fix(v5te): rework MSR/MRS handling to account for v5TE extension space
|
2023-09-07 01:26:51 -05:00 |
|
|
6dde25bd0f
|
fix(arm): group multiply instructions together
- implement clz in ARMv5TE
|
2023-09-07 01:26:51 -05:00 |
|
|
44b59512c0
|
feat(v5te): implement clz
|
2023-09-07 01:26:51 -05:00 |
|
|
ba22b856ec
|
chore: drop *Bus argument from the InstrFn LUT
|
2023-07-25 22:00:17 -05:00 |
|
|
f31c4bdb65
|
feat: stub coprocessor instructions
|
2023-07-25 22:00:17 -05:00 |
|
|
96a3a45d9b
|
feat: add v5te arm and thumb namespaces
also, drop the comptime parameter from arm and thumb namespaces
|
2023-07-25 22:00:17 -05:00 |
|